Patent classifications
H01L21/02513
METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN LAYER OF MONOCRYSTALLINE SIC ON A CARRIER SUBSTRATE OF POLYCRYSTALLINE SIC
A method for producing a composite silicon carbide structure comprises: providing an initial substrate of monocrystalline silicon carbide; depositing an intermediate layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the initial substrate, the intermediate layer having a thickness greater than or equal to 1.5 microns; implanting light ionic species through the intermediate layer to form a buried brittle plane in the initial substrate, delimiting the thin layer between the buried brittle plane and the intermediate layer, and depositing an additional layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the intermediate layer, the intermediate layer and the additional layer forming a carrier substrate, and separating the buried brittle plane during the deposition of the additional layer.
Non-uniform multiple quantum well structure
A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
Nanowire sized opto-electronic structure and method for modifying selected portions of same
A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.
Epitaxial base
An epitaxial base is provided. The epitaxial base includes a substrate and a carbon nanotube layer. The substrate has an epitaxial growth surface and defines a plurality of grooves and bulges on the epitaxial growth surface. The carbon nanotube layer covers the epitaxial growth surface, wherein a first part of the carbon nanotube layer attached on top surface of the bulges, and a second part of the carbon nanotube layer attached on bottom surface and side surface of the grooves.
Relaxed semiconductor layers with reduced defects and methods of forming the same
Methods of forming a layer of silicon germanium include forming an epitaxial layer of Si.sub.1-xGe.sub.x on a silicon substrate, wherein the epitaxial layer of Si.sub.1-xGe.sub.x has a thickness that is less than a critical thickness, hc, at which threading dislocations form in Si.sub.1-xGe.sub.x on silicon; etching the epitaxial layer of Si.sub.1-xGe.sub.x to form Si.sub.1-xGe.sub.x pillars that define a trench in the epitaxial layer of Si.sub.1-xGe.sub.x, wherein the trench has a height and a width, wherein the trench has an aspect ratio of height to width of at least 1.5; and epitaxially growing a suspended layer of Si.sub.1-xGe.sub.x from upper portions of the Si.sub.1-xGe.sub.x pillars, wherein the suspended layer defines an air gap in the trench beneath the suspended layer of Si.sub.1-xGe.sub.x.
Heterostructure including a composite semiconductor layer
A heterostructure for use in an electronic or optoelectronic device is provided. The heterostructure includes one or more composite semiconductor layers. The composite semiconductor layer can include sub-layers of varying morphology, at least one of which can be formed by a group of columnar structures (e.g., nanowires). Another sub-layer in the composite semiconductor layer can be porous, continuous, or partially continuous.
SEMICONDUCTOR STACKING STRUCTURE, AND METHOD AND APPARATUS FOR SEPARATING NITRIDE SEMICONDUCTOR LAYER USING SAME
A semiconductor stacking structure according to the present invention comprises: a monocrystalline substrate which is disparate from a nitride semiconductor; an inorganic thin film which is formed on a substrate to define a cavity between the inorganic thin film and the substrate, wherein at least a portion of the inorganic thin film is crystallized with a crystal structure that is the same as the substrate; and a nitride semiconductor layer which is grown from a crystallized inorganic thin film above the cavity. The method and apparatus for separating a nitride semiconductor layer according the present invention mechanically separate between the substrate and the nitride semiconductor layer. The mechanical separation can be performed by a method of separation of applying a vertical force to the substrate and the nitride semiconductor layer, a method of separation of applying a horizontal force, a method of separation of applying a force of a relative circular motion, and a combination thereof.
COMPOUND SEMICONDUCTOR DEVICE STRUCTURES COMPRISING POLYCRYSTALLINE CVD DIAMOND
A semiconductor device structure comprising: a layer of compound semiconductor material; and a layer of polycrystalline CVD diamond material, wherein the layer of polycrystalline CVD diamond material is bonded to the layer of compound semiconductor material via a layer of nano-crystalline diamond which is directly bonded to the layer of compound semiconductor material, the layer of nano-crystalline diamond having a thickness in a range 5 to 50 nm and configured such that an effective thermal boundary resistance (TBR.sub.eff) as measured by transient thermoreflectance at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m.sup.2K/GW.
METAL OXIDE AND TRANSISTOR INCLUDING METAL OXIDE
A novel metal oxide is provided. The metal oxide includes a crystal. The crystal has a structure in which a first layer, a second layer, and a third layer are stacked. The first layer, the second layer, and the third layer are each substantially parallel to a formation surface of the metal oxide. The first layer includes a first metal and oxygen. The second layer includes a second metal and oxygen. The third layer includes a third metal and oxygen. The first layer has an octahedral structure. The second layer has a trigonal bipyramidal structure or a tetrahedral structure. The third layer has a trigonal bipyramidal structure or a tetrahedral structure. The octahedral structure of the first layer includes an atom of the first metal at a center. The trigonal bipyramidal structure or the tetrahedral structure of the second layer includes an atom of the second metal at a center. The trigonal bipyramidal structure or the tetrahedral structure of the third layer includes an atom of the third metal at a center. The valence of the first metal is equal to the valence of the second metal. The valence of the first metal is different from the valence of the third metal.
STACK, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING STACK
A stack includes a base portion consisting of silicon carbide and having a first surface that is a Si face and a carbon atom thin film disposed on the first surface and including a first main surface facing the first surface and a second main surface that is a main surface on an opposite side from the first main surface. The carbon atom thin film consists of carbon atoms. The carbon atom thin film includes at least one of a buffer layer that is a carbon atom layer including carbon atoms bonded to silicon atoms forming the Si face and a graphene layer. The second main surface includes a plurality of terraces parallel to the Si face of the silicon carbide forming the base portion and a plurality of steps connecting together the plurality of terraces.