A method of manipulating deposition rates of poly-silicon and a method of manufacturing a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) device are provided. The method of manipulating deposition rates of poly-silicon includes: providing a substrate, where a first surface of the substrate includes at least two of an oxide material region, a silicon nitride material region and a silicon material region; performing a first treatment on the first surface of the substrate, so as to manipulate the deposition rates of poly-silicon on different regions of the first surface to be closer; and forming a poly-silicon layer on the first surface of the substrate.

A semiconductor device having favorable characteristics is provided. A semiconductor device having stable electrical characteristics is provided. An island-shaped insulating layer containing an oxide is provided in contact with a bottom surface of a semiconductor layer containing a metal oxide that exhibits semiconductor characteristics. The insulating layer containing an oxide is provided in contact with a portion of the semiconductor layer to be a channel formation region and is not provided under portions to be low-resistance regions.

A method of manufacturing a low temperature polysilicon thin film, including: forming a buffer layer on a substrate; forming a silicon layer on the buffer layer; providing a mask; patterning the silicon layer through the mask, wherein the patterned silicon layer includes a plurality of recrystallization growth spaces; and annealing the silicon layer to form a polysilicon layer, and a partial silicon material of the polysilicon layer is formed on the recrystallization growth space.

Embodiments including apparatus, systems, and methods for nanofabrication are provided. In one example, a method of manufacturing a semiconductor device includes forming a two-dimensional (2D) layer comprising a 2D material on a first substrate and forming a plurality of holes in the 2D layer to create a patterned 2D layer. The method also includes forming a single-crystalline film on the patterned 2D layer and transferring the single-crystalline film onto a second substrate.

Provided is a method of producing a semiconductor epitaxial wafer having enhanced gettering ability. The method of producing a semiconductor epitaxial wafer includes: a first step of irradiating a surface of a semiconductor wafer with cluster ions containing carbon, hydrogen, and nitrogen as constituent elements to form a modified layer that is located in a surface portion of the semiconductor wafer and contains the constituent elements of the cluster ions as a solid solution; and a second step of forming an epitaxial layer on the modified layer of the semiconductor wafer.

A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.

A method includes providing a layer of porous silicon carbide supported by a silicon carbide substrate, providing a layer of epitaxial silicon carbide on the layer of porous silicon carbide, forming a plurality of semiconductor devices in the layer of epitaxial silicon carbide, and separating the substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide. Additional methods are described.

A method includes forming a first amorphous material, forming a second amorphous material over and in contact with the first material, removing a portion of the second material and the first material to form pillars, and exposing the materials to a temperature between a crystallization temperature of the first material and a crystallization temperature of the second material. The first material and the second material each comprise at least one element selected from the group consisting of silicon and germanium. The second material exhibits a crystallization temperature different than a crystallization temperature of the first material. Semiconductor structures, memory devices, and systems are also disclosed.

Methods, systems, and apparatuses are described for a CMOS compatible substrate having multiple stacks of semiconductor layers. The multiple stacks, at least, each include i) a layer of a tellurium based semiconductor layer on top of ii) a porous silicon layer. The porous silicon layer is a compliant layer to accept structural defects from the tellurium based semiconductor layer into the porous silicon layer. The multiple stacks are grown on the CMOS compatible substrate.

Provided is a crystalline oxide film including: a plane tilted from a c-plane as a principal plane; gallium; and a metal in Group 9 of the periodic table, the metal in Group 9 of the periodic table among all metallic elements in the film having an atomic ratio of equal to or less than 23%.