A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate stack over an active region and a source/drain region in the active region adjacent the gate stack. The source/drain region includes a first semiconductor layer having a first germanium concentration and a second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second germanium concentration greater than the first germanium concentration. The source/drain region further includes a third semiconductor layer over the second semiconductor layer and a fourth semiconductor layer over the third semiconductor layer. The third semiconductor layer has a third germanium concentration greater than the second germanium concentration. The fourth semiconductor layer has a fourth germanium concentration less than the third germanium concentration.

A thin-film storage transistor includes (a) first and second semiconductor regions comprising polysilicon of a first conductivity; and (b) a channel region between the first and second semiconductor regions, the channel region comprising single-crystal epitaxial grown silicon, and wherein the thin-film storage transistor is formed above a monocrystalline semiconductor substrate.

Method for manufacturing a thin layer of textured AlN comprising the following successive steps: a) providing a substrate having an amorphous surface, b) forming a polycrystalline nucleation layer of MS.sub.2 with M=Mo, W or one of the alloys thereof, on the amorphous surface of the substrate, the polycrystalline nucleation layer consisting of crystalline domains the base planes of which are parallel to the amorphous surface of the substrate, the crystalline domains being oriented randomly in an (a, b) plane formed by the amorphous surface of the substrate, c) depositing aluminum nitride on the nucleation layer, leading to the formation of a thin layer of textured AlN.

A nitride power transistor comprises: a silicon substrate comprising a differently doped semiconductor composite structure for forming a space charge depletion region; and a nitride epitaxial layer located on the silicon substrate. With introduction of a differently doped semiconductor composite structure for forming a space charge depletion region inside a silicon substrate of a nitride power transistor, the nitride power transistor is capable of withstanding a relatively high external voltage, and thus a breakdown voltage of the device is improved.

A semiconductor film, a sheet like object, and a semiconductor device are provided that have inhibited semiconductor properties, particularly leakage current, and excellent withstand voltage and heat dissipation. A crystalline semiconductor film or a sheet like object includes a corundum structured oxide semiconductor as a major component, wherein the film has a film thickness of 1 μm or more. Particularly, the semiconductor film or the object includes a semiconductor component of oxide of one or more selected from gallium, indium, and aluminum as a major component. A semiconductor device has a semiconductor structure including the semiconductor film or the object.

There is provided a reverse-blocking semiconductor device that has a simple configuration, that is capable of improving a yield in a manufacturing process, and that secures a reverse withstand voltage by using a Schottky junction, and there is provided a method for manufacturing the reverse-blocking semiconductor device. A semiconductor device is provided that includes a first conductivity type semiconductor layer that has a front surface, a rear surface on an opposite side of the front surface, and an end surface, a MIS transistor structure formed at a front-surface portion of the semiconductor layer, a first electrode that forms a Schottky junction with a part of the semiconductor layer in the rear surface of the semiconductor layer, and an electric-field relaxation region that is formed to reach the rear surface from the front surface of the semiconductor layer in a peripheral region surrounding an active region in which the MIS transistor structure is formed and that is either a high-resistance region having higher resistance than the semiconductor layer or a second conductivity type impurity region.

[Overview] [Problem to be Solved] To provide a switching transistor and a semiconductor module having lower distortion generated in a signal. [Solution] A switching transistor including: a channel layer including a compound semiconductor and having sheet electron density equal to or higher than 1.7×10.sup.13 cm.sup.−2; a barrier layer formed on the channel layer by using a compound semiconductor that is of a different type from the channel layer; a gate electrode provided on the barrier layer; and a source electrode and a drain electrode provided on the barrier layer with the gate electrode interposed between the source electrode and the drain electrode.

Provided is a Chemical vapor deposition (CVD) equipment including a chamber having an inner space, a plurality of silicon wafers disposed in the inner space of the chamber in an upright position; and a plurality of shower nozzles configured to inject a mixed gas composed of a silicon deposition gas and an impurity gas toward each side edge of the plurality of wafers. The plurality of shower nozzles can be disposed at both sides of the plurality of the plurality of silicon wafers.

A method of fabricating an access device in a crosspoint memory array structure during BEOL processing includes: forming at least a first doped semiconductor layer on an upper surface of a first conductive layer, the first doped semiconductor layer being in electrical connection with the first conductive layer; exposing at least a portion of the first doped semiconductor layer to a directed energy source to cause localized annealing in the first doped semiconductor layer to activate a dopant of a first conductivity type in the first doped semiconductor layer, thereby converting at least a portion of the first doped semiconductor layer into a polycrystalline layer; forming a second conductive layer over a least a portion of the first doped semiconductor layer; and etching the first doped semiconductor layer and the first and second conductive layers to form an access device that is self-aligned with the first and second conductive layers.

The method for doping a semiconductor includes the following steps in the following order: separation layer deposition step, in which a separation layer is deposited on the surface of a substrate, a mixture material source layer deposition step, in which a mixture material source layer including a mixture material is deposited on the separation layer, the mixture material of the mixture material source layer including a dopant substance, and annealing the substrate, the separation layer, and the mixture material source layer in an annealing step to arrange diffusion of dopant substance from the mixture material source layer to the substrate and to the separation layer.