A thin film gas sensor device includes a substrate, a first pillar, a second pillar, a nanostructured thin film layer, and a first and a second electrical contact. The first and second pillars are supported by the substrate. The nanostructured thin film layer is formed with a semi-conductor material including holes. The semiconductor material is configured to undergo a reduction in a density of the holes in the presence of a target gas, thereby increasing an electrical resistance of the nanostructured thin film layer. The first and the second electrical contacts are operably connected to the nanostructured thin film layer, such that the increase in electrical resistance can be detected.

A method of depositing a silicon film on a recess formed in a surface of a substrate is provided. The substrate is placed on a rotary table in a vacuum vessel, so as to pass through first, second, and third processing regions in the vacuum vessel. An interior of the vacuum vessel is set to a first temperature capable of breaking an Si—H bond. In the first processing region, Si.sub.2H.sub.6 gas having a temperature less than the first temperature is supplied to form an SiH.sub.3 molecular layer on its surface. In the second processing region, a silicon atomic layer is exposed on the surface of the substrate, by breaking the Si—H bond in the SiH.sub.3 molecular layer. In the third processing region, by anisotropic etching, the silicon atomic layer on an upper portion of an inner wall of the recess is selectively removed.

A nitride semiconductor template includes a heterogeneous substrate, a first nitride semiconductor layer that is formed on one surface of the heterogeneous substrate, includes a nitride semiconductor and has an in-plane thickness variation of not more than 4.0%, and a second nitride semiconductor layer that is formed on an annular region including an outer periphery of an other surface of the heterogeneous substrate, includes the nitride semiconductor and has a thickness of not less than 1 μm.

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.

A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.

Structures described herein may include mechanically bonded interlayers for formation between a first Group III-V semiconductor layer and a second semiconductor layer. The mechanically bonded interlayers provide reduced lattice strain by strain balancing between the Group III-V semiconductor layer and the second semiconductor layer, which may be silicon.

A method of forming Si or Ge-based and III-V based vertically integrated nanowires on a single substrate and the resulting device are provided. Embodiments include forming first trenches in a Si, Ge, III-V, or Si.sub.xGe.sub.1-x substrate; forming a conformal SiN, SiO.sub.xC.sub.yN.sub.z layer over side and bottom surfaces of the first trenches; filling the first trenches with SiO.sub.x; forming a first mask over portions of the Si, Ge, III-V, or Si.sub.xGe.sub.1-x substrate; removing exposed portions of the Si, Ge, III-V, or Si.sub.xGe.sub.1-x substrate, forming second trenches; forming III-V, III-V.sub.xM.sub.y, or Si nanowires in the second trenches; removing the first mask and forming a second mask over the III-V, III-V.sub.xM.sub.y, or Si nanowires and intervening first trenches; removing the SiO.sub.x layer, forming third trenches; and removing the second mask.

Provided are a metal chalcogenide thin film and a method and device for manufacturing the same. The metal chalcogenide thin film includes a transition metal element and a chalcogen element, and at least one of the transition metal element and the chalcogen element having a composition gradient along the surface of the metal chalcogenide thin film, the composition gradient being an in-plane composition gradient. The metal chalcogenide thin film may be prepared by using a manufacturing method including providing a transition metal precursor and a chalcogen precursor on a substrate by using a confined reaction space in such a manner that at least one of the transition metal precursor and the chalcogen precursor forms a concentration gradient according to a position on the surface of the substrate; and heat-treating the substrate.

A method is provided for selective film deposition on a substrate. According to one embodiment, the method includes providing a substrate containing a first material having a first surface and second material having a second surface, where the first material includes a dielectric material and the second material contains a semiconductor material or a metal-containing material that excludes a metal oxide, reacting the first surface with a reactant gas containing a hydrophobic functional group to form a hydrophobic first surface, and depositing, by gas phase deposition, a metal oxide film on the second surface, where deposition of the metal oxide film is hindered on the hydrophobic first surface.

A mist-CVD apparatus contains a first atomizer for atomizing a first metal oxide precursor and generating a first mist of the first metal oxide precursor; a second atomizer for atomizing a second metal oxide precursor and generating a second mist of the second metal oxide precursor; a carrier-gas supplier for supplying a carrier gas to convey the first and second mists; a film-forming unit for forming a film on a substrate by subjecting the first and second mists to a thermal reaction; and a first conveyance pipe through which the first mist and the carrier gas are conveyed to the film forming chamber, a second conveyance pipe through which the second mist and the carrier gas are conveyed to the film forming chamber.