Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

A semiconductor substrate includes a first material layer made of a first material and including a plurality of protrusions, and a second material layer made of a second material different from the first material, filling spaces between the plurality of protrusions, and covering the plurality of protrusions. Each of the protrusions includes a tip and a plurality of facets converging at the tip, and adjacent facets of adjacent protrusions are in contact with each other,

Implementations described herein provide a method that includes implanting a dopant and carbon in a portion of a substrate of a semiconductor device. The method also includes depositing a first silicon-based layer on the portion of the substrate, the first silicon-based layer reacting with the carbon to form a diffusion region on the portion of the substrate. The method further includes forming a recessed portion of the semiconductor device, the recessed portion extending through the first silicon-based layer and the diffusion region and partially extending into the portion of the substrate. The method additionally includes depositing a second silicon-based layer within the recessed portion. The method further includes etching one or more portions of the second silicon-based layer and the portion of the substrate to form a set of fin structures that include the second silicon-based layer and the portion of the substrate having the dopant and the carbon implanted.

The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an In.sub.x1Al.sub.y1Ga.sub.1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an In.sub.x2Al.sub.y2Ga.sub.1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.

There is included (a) forming a chlorine-containing semiconductor layer on an insulating film provided on a surface of a substrate by supplying a first gas containing a semiconductor element and chlorine to the substrate; and (b) forming a semiconductor film on the chlorine-containing semiconductor layer by supplying a second gas containing a semiconductor element to the substrate, wherein a chlorine concentration in the chlorine-containing semiconductor layer formed in (a) is made 1.0×10.sup.20 atoms/cm.sup.3 or more and 1.0× 10.sup.22 atoms/cm.sup.3 or less.

A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.

A novel and useful quantum computing machine architecture that includes a classic computing core as well as a quantum computing core. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations. A partial readout of the quantum state in the quantum core is generated that is subsequently re-injected back into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the partial readout before being re-injected back into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate the control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or can be retrieved from classic memory where sequences of commands for the quantum core are stored a priori in the memory. A cryostat unit functions to provide several temperatures to the quantum machine including a temperature to cool the quantum computing core to approximately 4 Kelvin.

A composite substrate is provided in some embodiments of the present disclosure, which includes a substrate, an insulation layer, a first silicon-containing layer and a first epitaxial layer. The insulation layer is disposed on the substrate. The first silicon-containing layer is disposed on the insulation layer, in which the first silicon-containing layer includes a plurality of group V atoms. The first epitaxial layer is disposed on the first silicon-containing layer, in which the first epitaxial layer includes a plurality of group III atoms. A distribution concentration of the group V atoms in the first silicon-containing layer increases as getting closer to the first epitaxial layer, and a distribution concentration of the group III atoms in the first epitaxial layer increases as getting closer to the first silicon-containing layer. A method of manufacturing a composite substrate is also provided in some embodiments of the present disclosure.

Electric field management techniques in GaN based semiconductors that utilize patterned regions of differing conductivity under the active GaN device, such as a GaN high electron mobility transistor (HEMT), are described. As an example, a patterned layer of oxidized silicon can be formed superjacent a layer of silicon dioxide during or prior to the heteroepitaxy of GaN or another semiconductor material. These techniques can be useful for back-side electric field management because a silicon layer, for example, can be made conductive to act as a back-side field plate.