A method for bonding a first substrate with a second substrate, with the following sequence: production of a first amorphous layer on the first substrate and/or production of a second amorphous layer on the second substrate, bonding of the first substrate with the second substrate at the amorphous layer or at the amorphous layers to form a substrate stack, irradiation of the amorphous layer or the amorphous layers with radiation in such a way that the amorphous layer or the amorphous layers is/are transformed into a crystalline layer or crystalline layers.

First semiconductor structures are formed on a first wafer. At least one of the first semiconductor structures includes a processor, an array of SRAM cells, and a first bonding layer including first bonding contacts. Second semiconductor structures are formed on a second wafer. At least one of the second semiconductor structures includes an array of NAND memory cells and a second bonding layer including second bonding contacts. The first wafer and the second wafer are bonded in a face-to-face manner, such that the at least one of the first semiconductor structures is bonded to the at least one of the second semiconductor structures. The first bonding contacts of the first semiconductor structure are in contact with the second bonding contacts of the second semiconductor structure at a bonding interface. The bonded first and second wafers are diced into dies. At least one of the dies includes the bonded first and second semiconductor structures.

A semiconductor device manufacturing method of an embodiment includes forming a first layer in a region of a first substrate excluding an outer peripheral portion thereof; forming a first semiconductor circuit above the first layer; for a second semiconductor circuit on a second substrate; forming a second layer with a predetermined width at an outer peripheral portion of the second substrate; bonding a surface of the first substrate on a side provided with the first semiconductor circuit and a surface of the second substrate on a side provided with the second semiconductor circuit; and applying tensile stress to the first layer and the second layer to debond the first layer and the second layer, thereby forming the second substrate including the first semiconductor circuit and the second semiconductor circuit.

A device, a system and a method for bonding two substrates. A first substrate holder has a recess and an elevation.

Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

Methods of fabricating semiconductor device packages may involve forming trenches in a first wafer. A dielectric material may be placed over a first active surface. Electrically conductive elements may be operatively connected to bond pads of a second wafer with the dielectric material interposed between the first wafer and the second wafer. Force may be applied to the first wafer and the second wafer while exposing the first wafer and the second wafer to an elevated temperature. Portions of the dielectric material may flow into the trenches. The elevated temperature may be reduced to at least partially solidify the dielectric material. A thickness of the first wafer may be reduced to reveal the portions of the dielectric material in the trenches. The first wager may be singulated and the second wafer may be singulated to form semiconductor dice.

The exemplary embodiments describe techniques for a controlled chemical vapor deposition growth and transfer of arrayed TMD monolayers on predetermined locations, which enable the formation of single crystalline TMD monolayer arrays on specific locations. The unique growth process includes the patterning of transition metal oxide (e.g., MoO.sub.3) on the source substrate contacting the growth substrate face-to-face, where the growth of single crystalline TMD monolayers with controlled size and location, exclusively on predetermined locations on the growth substrates is accomplished. These TMD arrays can be align-transferred using a unique process that combines the wet and stamping transfer processes onto any target substrate with a pin-point accuracy, which dramatically enhances the integrity of transferred TMDs.

A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.

In a wafer to wafer bonding method, a first wafer is vacuum suctions on a first surface of a lower stage and a second wafer is vacuum suctioned on a second surface of an upper stage. Pressure is applied to a middle portion of the first wafer by a lower push rod and pressure is applied to a middle portion of the second wafer by an upper push rod. Bonding of the first and second wafers propagates radially outwards. A bonding propagation position of the first and second wafers is detected. A ratio of protruding lengths of the lower push rod and the upper push rod is changed according to the bonding propagation position.

The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient. The method additionally includes bonding the first and the second substrates by contacting the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate to form a substrate assembly. The method further includes post-bond annealing the assembly.