A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.

A method and device for bonding a first substrate with a second substrate inside a sealed bonding chamber. The method includes: a) fixing of the first and second substrates, b) arranging of the first and second substrates, c) mutual approaching of the first and second substrates, d) contacting the first and second substrates at respective bond initiation points, e) generating a bonding wave running from the bond initiation points to side edges of the substrates, and f) influencing the bonding wave during course of the bonding wave, wherein targeted influencing of the bonding wave takes place by a regulated and/or controlled change of pressure inside the bonding chamber.

In an embodiment, a device includes: a first device including: an integrated circuit device having a first connector; a first photosensitive adhesive layer on the integrated circuit device; and a first conductive layer on the first connector, the first photosensitive adhesive layer surrounding the first conductive layer; a second device including: an interposer having a second connector; a second photosensitive adhesive layer on the interposer, the second photosensitive adhesive layer physically connected to the first photosensitive adhesive layer; and a second conductive layer on the second connector, the second photosensitive adhesive layer surrounding the second conductive layer; and a conductive connector bonding the first and second conductive layers, the conductive connector surrounded by an air gap.

A method of manufacturing semiconductor elements includes: disposing a semiconductor layer made of a nitride semiconductor on a first wafer; and bonding a second wafer to the first wafer via the semiconductor layer. The first wafer has an upper surface including a first region and a second region surrounding a periphery of the first region and located lower than the first region. In a top view of the first wafer, a first distance between an edge of the first wafer and the first region of the first wafer in each of a plurality of first directions parallel to respective m-axes of the semiconductor layer is smaller than a second distance between the edge of the first wafer and the first region of the first wafer in each of a plurality of second directions parallel to respective a-axes of the semiconductor layer.

The present invention inter alia relates to a supported silica bilayer (SiO.sub.2 bilayer) film. In the supported silica bilayer film, the silica bilayer film consists of two atomic layers of corner-sharing SiO.sub.4 tetrahedra, forms in itself a chemically saturated structure and contains pores. The silica bilayer film has a first (1) and a second side (2) and is supported on the first side (1) by a removable polymer film. The invention further relates to a process for producing the supported silica bilayer film, a process for transferring a silica bilayer film, a free-standing silica bilayer film, a stack comprising a plurality of silica bilayer films, a filed-effect transistor having a gate oxide comprising the silica bilayer film or a stack thereof and the use of a silica bilayer film.

Embodiments of semiconductor structures for wafer flatness control and methods for using and forming the same are disclosed. In an example, a model indicative of a flatness difference of a wafer between a first direction and a second direction is obtained. The flatness difference is associated with one of a plurality of fabrication stages of a plurality of semiconductor devices on a front side of the wafer. A compensation pattern is determined for reducing the flatness difference based on the model. At the one of the plurality of the fabrication stages, a compensation structure is formed on a backside opposite to the front side of the wafer based on the compensation pattern to reduce the flatness difference.

Embodiments of wafer bonding method and structures thereof are disclosed. The wafer bonding method can include performing a plasma activation treatment on a front surface of a first and a front surface of a second wafer; performing a silica sol treatment on the front surfaces of the first and the second wafers; performing a preliminary bonding process of the first and second wafer; and performing a heat treatment of the first and the second wafers to bond the front surface of the first wafer to the front surface of the second wafers.

In example implementations of a heterogeneous substrate, the heterogeneous substrate includes a first material having an air trench, a second material coupled to the first material, a dielectric mask on a first portion of the second material and an active region that is grown on a remaining portion of the second material. An air gap may be formed in the air trench by the second material coupled to the first material. Defects in the second material may be contained to an area below the dielectric mask and the active region may remain defect free.

A manufacturing method for manufacturing a stacked substrate by bonding two substrates includes: acquiring information about crystal structures of a plurality of substrates; and determining a combination of two substrates to be bonded to each other, based on the information about the crystal structures. In the manufacturing method described above, the information about the crystal structures may include at least one of plane orientations of bonding surfaces and crystal orientations in a direction in parallel with the bonding surfaces. In the manufacturing methods described above, the determining may include determining a combination of the two substrates with a misalignment amount after bonding being equal to or smaller than a predetermined threshold.

A method and a device for bonding a first substrate with a second substrate inside a sealed bonding chamber. The method includes: a) fixing of the first and second substrates, b) arranging of the first and second substrates, c) mutual approaching of the first and second substrates, d) contacting the first and second substrates at respective bond initiation points, e) generating a bonding wave running from the bond initiation points to side edges of the substrates, and f) influencing the bonding wave during course of the bonding wave, wherein targeted influencing of the bonding wave takes place by a regulated and/or controlled change of pressure inside the bonding chamber.