H01L21/2007

Device and method for bonding substrates

A method for bonding a contact surface of a first substrate to a contact surface of a second substrate comprising of the steps of: positioning the first substrate on a first receiving surface of a first receiving apparatus and positioning the second substrate on a second receiving surface of a second receiving apparatus; establishing contact of the contact surfaces at a bond initiation site; and bonding the first substrate to the second substrate along a bonding wave which is travelling from the bond initiation site to the side edges of the substrates, wherein the first substrate and/or the second substrate is/are deformed for alignment of the contact surfaces.

Apparatus for processing a substrate and display device by using the same

Disclosed herein is an apparatus for processing a substrate that forms a hole in a substrate while reducing a burr in the hole so that a module device can be inserted into the hole to reduce the thickness of a display device, and the display device using the apparatus. The apparatus for processing the substrate comprises a body configured to operably be rotatable, and a cylindrical cutting tip at an end of the body. The bottom surface of the cutting tip is in an acute angle with respect to a contact surface of the substrate to allow formation of a groove at the substrate.

SUBSTRATE-TRANSFERRED SINGLE-CRYSTAL DIELECTRICS FOR QUANTUM INTEGRATED CIRCUITS
20190123097 · 2019-04-25 ·

A method for manufacturing a capacitor structure for quantum integrated circuits, in particular superconducting quantum integrated circuits, comprising: providing a first wafer structure comprising a first substrate; providing a second wafer structure comprising a second substrate; a heterostructure on the second substrate, the heterostructure comprising a buried etch stop layer, a dielectric layer on the etch stop layer, and a second metal film deposited on the etch stop layer of the heterostructure; bonding the first wafer structure and the second wafer structure together using the second metal film as bonding medium, thereby forming a bonded layer stack sandwiched between the first and the second substrate, the bonded layer stack comprising the buried etch stop layer, the dielectric layer and the second metal film; stripping the second substrate from the second wafer structure, stopping on the buried etch stop layer; selectively removing the buried etch stop layer from the bonded layer stack, thereby exposing the dielectric layer of the second wafer; forming a top electrode layer on the exposed dielectric layer of the second wafer; patterning a plurality of parallel trenches into the second metal film; wherein the step of patterning is performed either before the bonding step or else after the forming of the top electrode layer, wherein the parallel trenches extend through the top electrode layer and the bonded layer stack.

POLYCRYSTALLINE CERAMIC SUBSTRATE AND METHOD OF MANUFACTURE
20190115208 · 2019-04-18 · ·

A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.

Conductive barrier direct hybrid bonding

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

TRANSFERABLE SILICA BILAYER FILM
20190103269 · 2019-04-04 ·

The present invention inter alia relates to a supported silica bilayer (SiO.sub.2 bilayer) film. In the supported silica bilayer film, the silica bilayer film consists of two atomic layers of corner-sharing SiO.sub.4 tetrahedra, forms in itself a chemically saturated structure and contains pores. The silica bilayer film has a first (1) and a second side (2) and is supported on the first side (1) by a removable polymer film. The invention further relates to a process for producing the supported silica bilayer film, a process for transferring a silica bilayer film, a free-standing silica bilayer film, a stack comprising a plurality of silica bilayer films, a filed-effect transistor having a gate oxide comprising the silica bilayer film or a stack thereof and the use of a silica bilayer film.

Semiconductor substrate, semiconductor device and manufacturing method of semiconductor substrate
10249788 · 2019-04-02 · ·

A semiconductor substrate, a semiconductor device and a manufacturing method of the semiconductor substrate are provided. The semiconductor substrate comprises a first semiconductor layer and a second semiconductor layer located on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer, as well as semiconductor layers obtained by symmetrically rotating the first semiconductor layer and the second semiconductor layer according to their respective lattice structures, have different cleavage planes in a vertical direction. By providing the semiconductor substrates having composite structures, even if thicknesses of the substrates are not changed, the damages to the semiconductor substrates due to stresses by the semiconductor epitaxial layers can be reduced, thereby decreasing the likelihood of breakage of the semiconductor substrates. Furthermore, the processing difficulty is reduced and the reliability of the semiconductor devices is improved.

Method for manufacturing a semiconductor device comprising a thin semiconductor wafer

A method for manufacturing a vertical power semiconductor device is provided, wherein a first impurity is provided at the first main side of a semiconductor wafer. A first oxide layer is formed on the first main side of the wafer, wherein the first oxide layer is partially doped with a second impurity in such way that any first portion of the first oxide layer which is doped with the second impurity is spaced away from the semiconductor wafer by a second portion of the first oxide layer which is not doped with the second impurity and which is disposed between the first portion of the first oxide layer and the first main side of the semiconductor wafer. Thereafter a carrier wafer is bonded to the first oxide layer. During front-end-of-line processing on the second main side of the semiconductor wafer, the second impurity is diffused from the first oxide layer into the semiconductor wafer from its first main side by heat generated during the front-end-of-line processing.

METHOD FOR PRODUCING COMPOSITE WAFER
20190097596 · 2019-03-28 ·

To provide a method for producing a composite wafer capable of reducing a spurious arising by reflection of an incident signal on a joint interface between a lithium tantalate film and a supporting substrate, in the composite wafer including a supporting substrate having a low coefficient of thermal expansion, and a lithium tantalate film having a high coefficient of thermal expansion stacked on the supporting substrate. The method for producing a composite wafer is a method for producing a composite wafer that produces a composite wafer by bonding a lithium tantalate wafer having a high coefficient of thermal expansion to a supporting wafer having a low coefficient of thermal expansion, wherein prior to bonding together, ions are implanted from a bonding surface of the lithium tantalate wafer and/or the supporting wafer, to disturb crystallinity near the respective bonding surfaces.

SEED CRYSTAL FOR GROWTH OF GALLIUM NITRIDE BULK CRYSTAL IN SUPERCRITICAL AMMONIA AND FABRICATION METHOD.,/
20190096667 · 2019-03-28 ·

In one instance, the seed crystal of this invention provides a nitrogen-polar c-plane surface of a GaN layer supported by a metallic plate. The coefficient of thermal expansion of the metallic plate matches that of GaN layer. The GaN layer is bonded to the metallic plate with bonding metal. The bonding metal not only bonds the GaN layer to the metallic plate but also covers the entire surface of the metallic plate to prevent corrosion of the metallic plate and optionally spontaneous nucleation of GaN on the metallic plate during the bulk GaN growth in supercritical ammonia. The bonding metal is compatible with the corrosive environment of ammonothermal growth.