The present invention provides a method for producing a heteroepitaxial wafer heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method including: with using a reduced-pressure CVD apparatus, a first step of removing a native oxide film on a surface of the single crystal silicon substrate by hydrogen baking; a second step of nucleation of SiC on the single crystal silicon substrate on a condition of pressure of 13332 Pa or lower and a temperature of 300 C. or higher and 950 C. or lower and a third step of forming the 3C-SiC single crystal film by growing a SiC single crystal on condition of pressure of 13332 Pa or lower and a temperature of 800 C. or higher and lower than 1200 C., while supplying a source gas containing carbon and silicon into the reduced-pressure CVD apparatus. This provides the method for producing the heteroepitaxial wafer that can efficiently grow high-quality 3C-SiC single crystal film heteroepitaxially on the single crystal silicon substrate.

A GaN substrate doped with manganese, in which an activation energy of a carrier is 0.7 eV or more when a carrier concentration is represented by the formula (I): carrier concentration (atoms/cm.sup.3)=AEXP(Ea/kT). In the formula (I), A represents a proportional constant, EXP represents an exponential function, Ea represents a carrier activation energy (eV), k represents a Boltzmann constant (8.61710.sup.5 eV/K), and T represents a temperature (K) in Kelvin units.

A plasma processing apparatus includes a control device and configured to plasmarize a gas supplied to an interior of a processing container to perform a plasma processing on an object to be processed, wherein the control device includes: a measurer configured to measure an electron energy distribution function of plasma in the interior of the processing container, and a parameter changer configured to change parameters relating to the plasma processing so that the electron energy distribution function measured by the measurer during the plasma processing approaches a target electron energy distribution function.

A laminate includes a group 13 nitride single crystal substrate composed of a group 13 nitride single crystal and having a first main face and a second main face, a buffer layer provided on the first main face of the group 13 nitride single crystal substrate, a channel layer provided on the buffer layer and a barrier layer provided on the channel layer. The channel layer has a thickness of 700 nm or smaller, and the first main face of the group 13 nitride single crystal substrate has an off-angle of 0.4 or more and 1.0 or less.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.