H01L21/2015

Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
20170352579 · 2017-12-07 ·

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
20170352580 · 2017-12-07 ·

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

MAINTENANCE SYSTEM FOR SEMICONDUCTOR MANUFACTURING APPARATUS
20250066908 · 2025-02-27 ·

A maintenance system for a semiconductor manufacturing apparatus according to an embodiment includes: a chamber including a first seal portion and a second seal portion; a first separating means configured to separate the first seal portion to introduce air into the chamber; a second separating means configured to separate the second seal portion; an intake device configured to suck a gas in the chamber to remove toxic substances in the gas; and a connecting means configured to connect the intake device to the second seal portion being separated by the second separating means.

FILM FORMATION APPARATUS AND FILM FORMATION METHOD OF GALLIUM NITRIDE FILM
20250066901 · 2025-02-27 · ·

A film formation method of a gallium nitride film according to an embodiment of the present invention includes the steps of placing a substrate so as to face a target containing nitride and gallium in a vacuum chamber, heating the substrate, supplying a sputtering gas to the vacuum chamber, supplying a nitrogen radical and a hydrogen radical to the vacuum chamber, and applying a voltage to the target to generate a plasma of the sputtering gas. Gallium nitride generated by a recombination reaction between the gallium sputtered from the target and the nitrogen radical, and gallium nitride generated by a recombination reaction between a gallium cation generated from the gallium of the target and a nitrogen anion generated from the nitrogen radical are deposited on the substrate.

Group III nitride integration with CMOS technology

A method of forming a structure that can be used to integrate Si-based devices, i.e., nFETs and pFETs, with Group III nitride-based devices is provided. The method includes providing a substrate containing an nFET device region, a pFET device region and a Group III nitride device region, wherein the substrate includes a topmost silicon layer and a <111> silicon layer located beneath the topmost silicon layer. Next, a trench is formed within the Group III nitride device region to expose a sub-surface of the <111> silicon layer. The trench is then partially filled with a Group III nitride base material, wherein the Group III nitride material base material has a topmost surface that is coplanar with, or below, a topmost surface of the topmost silicon layer.

Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
20250112086 · 2025-04-03 · ·

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

HOLDING DEVICE

This holding device comprises: the first plate member having the first surface and a second surface; a disk-shaped second plate-shaped member which has a diameter larger than that of the first surface and has a third surface, a fourth surface, and a heating resistor, a first joining layer which is disposed between the second surface and the third surface and is for joining the first plate member and the second plate member, a base member having a fifth surface and a sixth surface; and a second joining layer which is disposed between the fourth surface and the fifth surface and is for joining the second plate member and the base member. The outer circumference of at least one of the first junction layer and the second junction layer is located so as to be withdrawn more toward the inner side than the outer circumference of the second plate member.

COMPOSITE STRUCTURE AND SEMICONDUCTOR MANUFACTURING APPARATUS INCLUDING COMPOSITE STRUCTURE
20250101597 · 2025-03-27 ·

Disclosed is a composite structure having low-particle generation usable for a member for a semiconductor manufacturing apparatus and also the semiconductor manufacturing apparatus. The composite structure including a base material and a structure that is provided on the base material wherein the structure comprises Y.sub.2O.sub.3ZrO.sub.2 solid solution (YZrO) as a main component, and lattice constant of the YZrO is 5.252 or greater or has an indentation hardness of more than 12 GPa. has low-particle generation and is suitably used as a member for a semiconductor apparatus.

TEMPLATE SUBSTRATE AND MANUFACTURING METHOD AND MANUFACTURING APPARATUS THEREOF, SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD AND MANUFACTURING APPARATUS THEREOF, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

A template substrate includes a main substrate containing silicon and including an edge, a mask located above the main substrate and including an opening portion, a seed portion located at the opening portion above the main substrate, and a protecting portion overlapping the edge when viewed from a side and containing a material different from gallium.

GROUP III NITRIDE CRYSTAL MANUFACTURING APPARATUS AND MANUFACTURING METHOD
20250092565 · 2025-03-20 ·

A group III nitride crystal manufacturing apparatus includes a raw material chamber that generates a group III element oxide gas, a growth chamber that causes the group III element oxide gas supplied from the raw material chamber to react with a nitrogen element-containing gas to generate a group III nitride crystal on a seed substrate, a first exhaust pipe connected downstream of the growth chamber that discharges gas from the growth chamber and is set to more than or equal to 1000 C., a first deposition pipe connected to a downstream side of the first exhaust pipe and set to more than or equal to 700 C. and less than 1050 C., a second deposition pipe connected to a downstream side of the first deposition pipe and set to less than 800 C., and a second exhaust pipe connected to a downstream side of the second deposition pipe that exhausts gas to an outside.