A semiconductor device includes a base substrate, a doped region at an upper surface of the base substrate, and a transistor over the upper surface of the base substrate and formed from a plurality of epitaxially-grown semiconductor layers. The doped region includes one or more ion species, and has a lower boundary above a lower surface of the base substrate. The base substrate may be a silicon substrate, and the transistor may be a GaN HEMT formed from a plurality of heteroepitaxial layers that include aluminum nitride and/or aluminum gallium nitride. The doped region may be a diffusion barrier region and/or an enhanced resistivity region. The ion species may be selected from phosphorus, arsenic, antimony, bismuth, argon, helium, nitrogen, and oxygen. When the ion species includes oxygen, the doped region may include a silicon dioxide layer formed from annealing the doped region after introduction of the oxygen.

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer having a greater band gap than the first nitride semiconductor layer; a source electrode and a drain electrode on the second nitride semiconductor layer apart from each other; a third nitride semiconductor layer, between the source electrode and the drain electrode, containing a p-type first impurity and serving as a gate; and a fourth nitride semiconductor layer, between the third nitride semiconductor layer and the drain electrode, containing a p-type second impurity, wherein the average carrier concentration of the fourth nitride semiconductor layer is lower than the average carrier concentration of the third nitride semiconductor layer.

A process of forming a light-receiving device type of avalanche photodiode (APD) is disclosed. The process includes steps of: (1) growing semiconductor layers on a semiconductor substrate, the semiconductor layers providing a first area on a top thereof; (2) thermally diffusing impurities within the semiconductor layers in a second area outside of the first area so as to leave a roughed surface in a top of the second area, the impurities laterally diffusing to form an diffusion edge locating inside of the first area; and (3) removing the semiconductor layers including the roughed surface thereof in the second area to form a mesa in the first area, the mesa including the diffusion edge in a periphery thereof but excluding the roughed surface.

A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor layer, a first and second electrode located on or above the first nitride semiconductor layer; a trench located in the second nitride semiconductor layer between the first electrode and the second electrode, and including a bottom surface and a side surface, the bottom surface being located in one of the first nitride semiconductor layer and the second nitride semiconductor layer; a gate electrode located in the trench; a gate insulating layer located between the bottom surface and the gate electrode and between the side surface and the gate electrode; and a region located in at least one of the first nitride semiconductor layer and the second nitride semiconductor layer, including a first portion adjacent to the bottom surface, and containing fluorine.

A semiconductor structure is provided that contains a non-volatile battery which controls gate bias and has increased output voltage retention and voltage resolution. The semiconductor structure may include a semiconductor substrate including at least one channel region that is positioned between source/drain regions. A gate dielectric material is located on the channel region of the semiconductor substrate. A battery stack is located on the gate dielectric material. The battery stack includes, a cathode current collector located on the gate dielectric material, a cathode material located on the cathode current collector, a first ion diffusion barrier material located on the cathode material, an electrolyte located on the first ion diffusion barrier material, a second ion diffusion barrier material located on the electrolyte, an anode region located on the second ion diffusion barrier material, and an anode current collector located on the anode region.

A semiconductor device having a back-side field plate includes a buffer layer that includes a first compound semiconductor material, where the buffer layer is epitaxial to a crystalline substrate. The semiconductor device also includes field plate layer that is disposed on a surface of the buffer layer. The semiconductor device further includes a first channel layer disposed over the field plate layer, where the first channel layer includes the first compound semiconductor material. The semiconductor device further includes a region comprising a two-dimensional electron gas, where the two-dimensional electron gas is formed at an interface between the first channel layer and a second channel layer. The semiconductor device additionally includes a back-side field plate that is formed by a region of the field plate layer and is electrically isolated from other regions of the field plate layer.

The invention relates to a method for producing a semiconductor component comprising performing a plasma treatment of an exposed surface of a semiconductor material with halogens, and carrying out a diffusion method with dopants on the exposed surface.

A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.

A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor layer, a first and second electrode located on or above the first nitride semiconductor layer; a trench located in the second nitride semiconductor layer between the first electrode and the second electrode, and including a bottom surface and a side surface, the bottom surface being located in one of the first nitride semiconductor layer and the second nitride semiconductor layer; a gate electrode located in the trench; a gate insulating layer located between the bottom surface and the gate electrode and between the side surface and the gate electrode; and a region located in at least one of the first nitride semiconductor layer and the second nitride semiconductor layer, including a first portion adjacent to the bottom surface, and containing fluorine.

A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.