[Object] Provided are a laminate film and an electrode substrate film with excellent etching quality, in which a circuit pattern formed by etching processing is less visible under highly bright illumination, and a method of manufacturing the same.

[Solving Means] A laminate film includes a transparent substrate 60 formed of a resin film and a layered film provided on at least one surface of the transparent substrate. The layered film includes metal absorption layers 61 and 63 as a first layer and metal layers (62, 65), (64, 66) as a second layer, counted from the transparent substrate side. The metal absorption layers are formed by a reactive sputtering method which uses a metal target made of Ni alone or an alloy containing two or more elements selected from Ni, Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, and Cu, and a reactive gas containing oxygen. The reactive gas contains hydrogen.

A method for manufacturing a memory device includes forming trenches in a substrate to define an active region, filling an insulation material in the trenches, treating at least one portion of the insulation material, removing an upper portion of the insulation material from the trenches, so as to expose upper portions of side surfaces of the active region and to convert remaining portions of the insulation material in the trenches to shallow trench isolation (STI) disposed on opposite sides of the active region, forming a lower oxide layer, a middle charge trapping layer, and an upper oxide layer which cover the exposed upper portions of the side surfaces of the active region, an upper surface of the active region between the side surfaces of the active region, and the STI, and forming a gate layer on the upper oxide layer.

A method of fabricating a semiconductor device includes forming a hard mask (HM) mandrel along a first direction over a material layer, forming a first spacer along a sidewall of the HM mandrel, forming a second spacer along a sidewall of the first spacer and forming a patterned photoresist layer having a first line opening over the HM mandrel, the first spacer and the second spacer. First portions of the HM mandrel, the first spacer and the second spacer are exposed within the first line opening. The method also includes removing the first portion of the first spacer through the first line opening to expose a first portion of the material layer and etching the exposed first portion of the material layer to form a first opening in the material layer by using the exposed first portions of the HM mandrel and the second spacer as a sub-etch-mask.

The plasma processing apparatus has a plasma processing chamber where plasma processing of the sample is performed, and plasma power supply that supplies radio frequency electric power for generating plasma. The radio frequency electric power is time modulated by a pulse wave having a first period and a second period that are repeated periodically. The pulse wave of the first period has first amplitude and the pulse wave of the second period has second amplitude which is a limited value smaller than the first amplitude. The extinction of the plasma, which is generated during the first period having the first amplitude, is maintained during the second period having the second amplitude with a predetermined dissociation.

A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.

Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may be arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern. The pattern decomposition techniques may be integrated into any number of patterning processes, such as litho-freeze-litho-etch and litho-etch-litho-etch patterning processes.

A method comprises forming a first conductive line and a second conductive line in a first dielectric layer over a substrate, each having a planar top surface, applying an etch-back process to the first dielectric layer until a dielectric portion between the first conductive line and the second conductive line has been removed, and the first conductive line and the second conductive line have respective cross sectional shapes including a rounded surface and two rounded corners and depositing a second dielectric layer over the substrate, while leaving a first air gap between the first conductive line and the second conductive line.

Photovoltaics configured to be manufactured without epitaxial processes and methods for such manufacture are provided. Methods utilize bulk semiconducting crystal substrates, such as, for example, GaAs and InP such that epitaxy processes are not required. Nanowire etch and exfoliation processes are used allowing the manufacture of large numbers of photovoltaic cells per substrate wafer (e.g., greater than 100). Photovoltaic cells incorporate electron and hole selective contacts such that epitaxial heterojunctions are avoided during manufacture.

In a capacitive coupled etch reactor, in which the smaller electrode is predominantly etched, the surface of the larger electrode is increased by a body e.g. a plate, which is on the same electric potential as the larger electrode and which is immersed in the plasma space. A pattern of openings in which plasma may burn is provided in the body so as to control the distribution of the etching effect on a substrate placed on the smaller electrode.

A method includes depositing a second dielectric layer over a first dielectric layer, depositing a third dielectric layer over the second dielectric layer, patterning a plurality of first openings in the third dielectric layer, etching the second dielectric layer through the first openings to form second openings in the second dielectric layer, performing a plasma etching process directed at the second dielectric layer from a first direction, the plasma etching process extending the second openings in the first direction, and etching the first dielectric layer through the second openings to form third openings in the first dielectric layer.