A laminated element manufacturing method includes a first forming step of forming a first gettering region for each of functional elements by irradiating a semiconductor substrate of a first wafer with a laser light, a first grindsing step of grinding the semiconductor substrate of the first wafer and removing a portion of the first gettering region, a bonding step of bonding a circuit layer of a second wafer to the semiconductor substrate of the first wafer, a second forming step of forming a second gettering region for each of the functional elements by irradiating the semiconductor substrate of the second wafer with a laser light, and a second grinding step of grinding the semiconductor substrate of the second wafer and removing a portion of the second gettering region.

Methods and apparatus for gettering impurities in semiconductors are disclosed. A disclosed example multilayered die includes a substrate material, a component layer below the substrate material, and an impurity attractant region disposed in the substrate material.

Provided is a method of producing an epitaxial silicon wafer having high gettering capability resulting in even more reduced white spot defects in a back-illuminated solid-state imaging device. The method includes: a first step of irradiating a surface of a silicon wafer with cluster ions of C.sub.nH.sub.m (n=1 or 2, m=1, 2, 3, 4, or 5) generated using a Bernas ion source or an IHC ion source, thereby forming, in the silicon wafer, a modifying layer containing, as a solid solution, carbon and hydrogen that are constituent elements of the cluster ions; and a subsequent second step of forming a silicon epitaxial layer on the surface. In the first step, peaks of concentration profiles of carbon and hydrogen in the depth direction of the modifying layer are made to lie in a range of more than 150 nm and 2000 nm or less from the surface.

Various semiconductor chips with gettering regions and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a semiconductor chip that has a first side and a second side opposite the first side. The first side has a plurality of laser ablation craters. Each of the ablation craters has a bottom. A gettering region is in the semiconductor chip beneath the laser ablation craters. The gettering region includes plural structural defects. At least some of the structural defects emanate from at least some of the bottoms of the laser ablation craters.

A method of processing a wafer includes a grinding step of grinding a reverse side of a wafer that has first insulating films covering via electrodes, an electrode protruding step of protruding the via electrodes covered with the first insulating films from the reverse side by supplying a first etching gas turned to a plasma, an insulating film forming step of covering the reverse side with a second insulating film, a via electrode exposing step of supplying a second etching gas turned to a plasma to expose the via electrodes after having formed a resist film having openings overlapping the via electrodes, and an electrode forming step of forming electrodes connected to the via electrodes.

A method of processing a wafer includes a grinding step of grinding a wafer that has first insulating films covering via electrodes, from a reverse side thereof, an electrode protruding step of protruding the via electrodes covered with the first insulating films from the reverse side by way of etching, a distorted layer forming step of forming a distorted layer on the reverse side of the wafer, an insulating film forming step of forming a second insulating film on the reverse side of the wafer, and an electrode forming step of removing the first insulating films and the second insulating film from the regions where they overlap the via electrodes, and forming reverse-side electrodes connected to the via electrodes.

Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

Plural sessions of proton irradiation are performed by differing ranges from a substrate rear surface side. After first to fourth n-type layers of differing depths are formed, the protons are activated. Next, helium is irradiated to a position deeper than the ranges of the proton irradiation from the substrate rear surface, introducing lattice defects. When the amount of lattice defects is adjusted by heat treatment, protons not activated in a fourth n-type layer are diffused, forming a fifth n-type layer contacting an anode side of the fourth n-type layer and having a carrier concentration distribution that decreases toward the anode side by a more gradual slope than that of the fourth n-type layer. The fifth n-type layer that includes protons and helium and the first to fourth n-type layers that include protons constitute an n-type FS layer. Thus, a semiconductor device having improved reliability and lower cost may be provided.

A method for packaging an integrated circuit including a first semiconductor device and a second semiconductor device arranged on a substrate includes calculating parameters of a forming gas based on each of a curing temperature and an estimate of a surface trap density associated with the integrated circuit, dispensing a molding compound over the first semiconductor device, the second semiconductor device, and the substrate, and curing the molding compound in accordance with the curing temperature while flowing the forming gas in accordance with the calculated parameters.

In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.