Patent classifications
H01L21/3221
VERTICAL POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. The drift region includes platinum atoms. The vertical power semiconductor device further includes a field stop region in the semiconductor body between the drift region and the second main surface. The field stop region includes a plurality of impurity peaks. A first impurity peak of the plurality of impurity peaks has a larger concentration than a second impurity peak of the plurality of impurity peaks. The first impurity peak includes hydrogen and the second impurity peak includes helium.
Integrated structures and methods of forming integrated structures
Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.
SEMICONDUCTOR DEVICE STRUCTURE HAVING GATE DIELECTRIC LAYER
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The semiconductor device structure includes a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion. The metal gate stack includes a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, and the gate dielectric layer includes fluorine. A first part of the isolation layer is not covered by the metal gate stack, the first part includes fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.
METHOD FOR SUSPENDING A THIN LAYER ON A CAVITY WITH A STIFFENING EFFECT OBTAINED BY PRESSURISING THE CAVITY BY IMPLANTED SPECIES
The invention relates to a method for transferring a semiconductor layer from a donor substrate to a receiver substrate having an open cavity, comprising the steps of forming an embrittlement plane in the donor substrate, making, by bringing the donor substrate and the receiver substrate into contact, a packaging in which said cavity is buried, and separating the packaging by fracturing along the embrittlement plane, said separating causing a transfer of the semiconductor layer to the receiver substrate and a sealing of the cavity by the semiconductor layer.
This method comprises, prior to making the packaging, a step of implanting diffusing species into the donor substrate or into the receiver substrate and, subsequently to making the packaging and prior to separating the packaging, a step of diffusing said species into the cavity.
Laminated element manufacturing method
A laminated element manufacturing method includes a first forming step of forming a first gettering region for each of functional elements by irradiating a semiconductor substrate of a first wafer with a laser light, a first grindsing step of grinding the semiconductor substrate of the first wafer and removing a portion of the first gettering region, a bonding step of bonding a circuit layer of a second wafer to the semiconductor substrate of the first wafer, a second forming step of forming a second gettering region for each of the functional elements by irradiating the semiconductor substrate of the second wafer with a laser light, and a second grinding step of grinding the semiconductor substrate of the second wafer and removing a portion of the second gettering region.
Semiconductor device and manufacturing method thereof
An object of the present invention is to provide stable withstand voltage characteristics, reduce turn-off losses along with a reduction in leakage current when the device is off, improve controllability of turn-off operations, and improve blocking capability at turn-off. An N buffer layer includes a first buffer layer joined to an active layer and having one peak in impurity concentration, and a second buffer layer joined to the first buffer layer and an N.sup.− drift layer, having at least one peak point in impurity concentration, and having a lower maximum impurity concentration than the first buffer layer. The impurity concentration at the peak point of the first buffer layer is higher than the impurity concentration of the N.sup.− drift layer, and the impurity concentration of the second buffer layer is higher than the impurity concentration of the N.sup.− drift layer in the entire area of the second buffer layer.
Method for manufacturing electronic device and method for removing impurity using same
Provided are a method for manufacturing an electronic device capable of efficiently utilizing a material and a method for removing impurities using the same. The method for manufacturing an electronic device comprises the steps of: placing a transfer film on a plurality of functional layers which are positioned apart from each other on a source substrate; bringing a first transfer target into close contact with the lower surface of the transfer film by applying pressure to a portion of the transfer film that corresponds to the first transfer target from among the plurality of functional layers by using a probe; separating the transfer film from the source substrate in a state in which the first transfer target is in close contact with the lower surface; placing the transfer film on a target substrate in the state in which the first transfer target is in close contact with the lower surface; placing the first transfer target on the target substrate by applying pressure to a portion of the transfer film that corresponds to the first transfer target; and separating the transfer film from the target substrate in a state in which the first transfer target is positioned on the target surface.
Method of producing a wafer from an ingot including a peel-off detecting step
A method of producing a wafer includes a peel-off layer forming step to form a peel-off layer in a hexagonal single-crystal ingot by applying a laser beam having a wavelength transmittable through the hexagonal single-crystal ingot while positioning a focal point of the laser beam in the hexagonal single-crystal ingot at a depth corresponding to the thickness of a wafer to be produced from an end face of the hexagonal single-crystal ingot, an ultrasonic wave generating step to generate ultrasonic waves from an ultrasonic wave generating unit positioned in facing relation to the wafer to be produced across a water layer interposed therebetween, thereby to break the peel-off layer, and a peel-off detecting step to detect when the wafer to be produced is peeled off the hexagonal single-crystal ingot by positioning an image capturing unit sideways of the wafer to be produced.
Methods for film modification
A method of converting films is disclosed. A method of modifying films is also disclosed. Some methods advantageously convert films from a first elemental composition to a second elemental composition. Some methods advantageously modify film properties without modifying film composition.
GETTERING PROPERTY EVALUATION APPARATUS
A gettering property evaluation apparatus includes a gettering determination unit and a chuck table. The gettering determination unit has a laser beam applying unit for applying a laser beam to a wafer, and a transmission-reception unit for applying a microwave to the wafer and receiving the microwave reflected by the wafer. The gettering determination unit determines whether or not a gettering layer including a grinding strain generated by grinding the wafer has a gettering property. The chuck table holds the wafer on a holding surface. The chuck table has a conductive nonmetallic porous member constituting the holding surface and having a property of reflecting or absorbing the microwave, and a base member provided with a negative pressure transmission passage for transmitting a negative pressure to the nonmetallic porous member.