A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method.

A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method.

A thin film transistor (TFT) device is provided, where the TFT may include a source and a drain, a gate stack, and a semiconductor body. The gate stack may include a gate dielectric structure and a gate electrode, and the gate stack may be between the source and the drain. A first section of the semiconductor body may be adjacent to at least a section of the gate stack. A spacer may be between the gate stack and the source, where the spacer may be on the semiconductor body, and where a second section of the semiconductor body underneath the spacer may comprise dopants.

A thin film transistor (TFT) device is provided, where the TFT may include a source and a drain, a gate stack, and a semiconductor body. The gate stack may include a gate dielectric structure and a gate electrode, and the gate stack may be between the source and the drain. A first section of the semiconductor body may be adjacent to at least a section of the gate stack. A spacer may be between the gate stack and the source, where the spacer may be on the semiconductor body, and where a second section of the semiconductor body underneath the spacer may comprise dopants.

The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

In an oxide semiconductor device including an active layer region constituted by an oxide semiconductor, stability when a stress is applied is improved. The oxide semiconductor device includes an active layer region constituted by an oxide semiconductor of indium (In), gallium (Ga), and zinc (Zn), wherein the active layer region contains an element selected from titanium (Ti), zirconium (Zr), and hafnium (Hf) that are Group 4 elements, or carbon (C), silicon (Si), germanium (Ge), and tin (Sn) that are Group 14 elements at a number density in a range of 110.sup.16 to 110.sup.20 cm.sup.3.

In an oxide semiconductor device including an active layer region constituted by an oxide semiconductor, stability when a stress is applied is improved. The oxide semiconductor device includes an active layer region constituted by an oxide semiconductor of indium (In), gallium (Ga), and zinc (Zn), wherein the active layer region contains an element selected from titanium (Ti), zirconium (Zr), and hafnium (Hf) that are Group 4 elements, or carbon (C), silicon (Si), germanium (Ge), and tin (Sn) that are Group 14 elements at a number density in a range of 110.sup.16 to 110.sup.20 cm.sup.3.

This disclosure discloses an array substrate and a manufacturing method, and a display device, the array substrate including: a channel layer; a gate insulating layer including a first portion and a second portion connected side by side, arranged on the channel layer, and exposing a source and drain contact zone on the channel layer, the second portion of the gate insulating layer being located on both sides of the first portion of the gate insulating layer; a gate layer, disposed on the first portion of the gate insulating layer; and a source and a drain, correspondingly connected to the contact region of the source and drain of the channel layer respectively. The array substrate of this disclosure solves the array substrate leakage problem caused by conductorizing the channel layer due to performing ion implantation to the channel layer.

A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.