In one aspect, a method includes depositing a first glass layer on a metallization layer and depositing an etch stop layer on the first glass layer. The method further includes depositing a second glass layer on the etch stop layer and polishing the second glass layer down to at least a surface of the etch stop layer.

In one aspect, a method includes depositing a first glass layer on a metallization layer and depositing an etch stop layer on the first glass layer. The method further includes depositing a second glass layer on the etch stop layer and polishing the second glass layer down to at least a surface of the etch stop layer.

A method including: a step of preparing a substrate that includes a first layer having a first principal surface provided with a dicing region, and a mark, and a second principal surface, and includes a semiconductor layer; a step of covering a first region corresponding to the mark on the second principal surface, with a resist film; a step of forming a metal film on the second principal surface; a step of removing the resist film, to expose the semiconductor layer corresponding to the first region; a step of imaging the substrate, with a camera, to detect a position of the mark through the semiconductor layer, and calculating a second region corresponding to the dicing region on a surface of the metal film; and a step of irradiating a laser beam to the second region, to remove the metal film and expose the semiconductor layer corresponding to the second region.

A method including: a step of preparing a substrate that includes a first layer having a first principal surface provided with a dicing region, and a mark, and a second principal surface, and includes a semiconductor layer; a step of covering a first region corresponding to the mark on the second principal surface, with a resist film; a step of forming a metal film on the second principal surface; a step of removing the resist film, to expose the semiconductor layer corresponding to the first region; a step of imaging the substrate, with a camera, to detect a position of the mark through the semiconductor layer, and calculating a second region corresponding to the dicing region on a surface of the metal film; and a step of irradiating a laser beam to the second region, to remove the metal film and expose the semiconductor layer corresponding to the second region.

A method for manufacturing a semiconductor structure with power connecting structures under transistors comprises: forming a stop layer structure in a semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part; forming a plurality of stop portions in the first substrate part and in proximity to an active surface; arranging the transistor elements on the active surface, the contact portions of the transistor elements corresponding to the stop portions; removing the second substrate part and the stop layer structure; forming a first patterned mask layer with first patterned openings on a bottom surface of the first substrate part, the first patterned openings corresponding to the stop portions; forming through open slots in the first substrate part and exposing the contact portions via the open slots; forming a protecting layer to cover side walls of the open slots; forming a conductive layer to cover the contacts; and forming the power connecting structures in the open slots. The method has flexibility and can improve the device performance.

A method for manufacturing a semiconductor structure with power connecting structures under transistors comprises: forming a stop layer structure in a semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part; forming a plurality of stop portions in the first substrate part and in proximity to an active surface; arranging the transistor elements on the active surface, the contact portions of the transistor elements corresponding to the stop portions; removing the second substrate part and the stop layer structure; forming a first patterned mask layer with first patterned openings on a bottom surface of the first substrate part, the first patterned openings corresponding to the stop portions; forming through open slots in the first substrate part and exposing the contact portions via the open slots; forming a protecting layer to cover side walls of the open slots; forming a conductive layer to cover the contacts; and forming the power connecting structures in the open slots. The method has flexibility and can improve the device performance.

A method includes applying a temporary pad to a conductive pad of a semiconductor die. After testing the semiconductor die, the temporary pad is removed from the conductive pad.

A method includes applying a temporary pad to a conductive pad of a semiconductor die. After testing the semiconductor die, the temporary pad is removed from the conductive pad.

A dividing method of a substrate includes a close contact step of bringing an expanding tape into close contact with a substrate after execution of a modified layer forming step and before execution of a chip interval expansion step. Therefore, when the expanding tape is expanded in the chip interval expansion step, it is possible to favorably form plural chips with use of modified layers as the origin and to favorably widen the interval between the plural chips.

A dividing method of a substrate includes a close contact step of bringing an expanding tape into close contact with a substrate after execution of a modified layer forming step and before execution of a chip interval expansion step. Therefore, when the expanding tape is expanded in the chip interval expansion step, it is possible to favorably form plural chips with use of modified layers as the origin and to favorably widen the interval between the plural chips.