A manufacturing method of a semiconductor structure includes at least the following steps. A patterned mask layer with a first opening is formed on a dielectric layer overlying a semiconductor substrate. A portion of the dielectric layer accessibly exposed by the first opening of the patterned mask layer is removed to form a second opening. A first protective film is formed on inner sidewalls of the dielectric layer and the patterned mask layer, where the second opening and the first protective film are formed at the same step. A second protective film is formed on the first protective film to form a protective structure covering the inner sidewalls. A portion of the semiconductor substrate accessibly exposed by the second opening is removed to form a via hole including an undercut underlying the protective structure. The via hole is trimmed and a through substrate via is formed in the via hole.

A manufacturing method of a semiconductor structure includes at least the following steps. A patterned mask layer with a first opening is formed on a dielectric layer overlying a semiconductor substrate. A portion of the dielectric layer accessibly exposed by the first opening of the patterned mask layer is removed to form a second opening. A first protective film is formed on inner sidewalls of the dielectric layer and the patterned mask layer, where the second opening and the first protective film are formed at the same step. A second protective film is formed on the first protective film to form a protective structure covering the inner sidewalls. A portion of the semiconductor substrate accessibly exposed by the second opening is removed to form a via hole including an undercut underlying the protective structure. The via hole is trimmed and a through substrate via is formed in the via hole.

According to one embodiment, a method for manufacturing a semiconductor device includes placing a semiconductor chip on a first surface of a support substrate, forming a first resin layer covering the semiconductor chip on the first surface, and forming a second resin layer on a second surface of the support substrate. The second surface is opposite the first surface. In some examples, the second resin layer can be formed to counteract or mitigate warpage of the support substrate that might otherwise result from use of the first resin layer.

According to one embodiment, a method for manufacturing a semiconductor device includes placing a semiconductor chip on a first surface of a support substrate, forming a first resin layer covering the semiconductor chip on the first surface, and forming a second resin layer on a second surface of the support substrate. The second surface is opposite the first surface. In some examples, the second resin layer can be formed to counteract or mitigate warpage of the support substrate that might otherwise result from use of the first resin layer.

Provided is a manufacturing method of a semiconductor device including a semiconductor substrate having an upper surface. The manufacturing method includes forming a trench on the upper surface of the semiconductor substrate, arranging a material by arranging a surface-treatment material on the upper surface of the semiconductor substrate and the surface of the trench, applying a resist to an interior of the trench, and patterning the resist by exposing the resist using a mask to leave the resist in the interior of the trench predetermined. Surface free energy of solids of the surface-treatment material is less than surface free energy of liquids of the resist.

Provided is a manufacturing method of a semiconductor device including a semiconductor substrate having an upper surface. The manufacturing method includes forming a trench on the upper surface of the semiconductor substrate, arranging a material by arranging a surface-treatment material on the upper surface of the semiconductor substrate and the surface of the trench, applying a resist to an interior of the trench, and patterning the resist by exposing the resist using a mask to leave the resist in the interior of the trench predetermined. Surface free energy of solids of the surface-treatment material is less than surface free energy of liquids of the resist.

A method of fabricating a semiconductor device includes forming a first semiconductor region at a front surface of a substrate, the first semiconductor region including an active element that regulates current flowing in a thickness direction of the substrate; grinding a rear surface of the substrate; after the grinding, performing a first etching that etches the rear surface of the substrate with a chemical solution including phosphorus; after the first etching, performing a second etching that etches the rear surface with an etching method with a lower etching rate than the first etching; and after the second etching, forming a second semiconductor region through which the current is to flow, by implanting impurities from the rear surface of the substrate.

A chemical mechanical polishing (CMP) composition (Q) for chemical mechanical polishing of a substrate (S) containing (i) cobalt and/or (ii) a cobalt alloy, wherein the CMP composition (Q) contains: (A) Inorganic particles, (B) a substituted aromatic compound with at least one carboxylic acid function as corrosion inhibitor, (C) at least one amino acid, (D) at least one oxidizer, (E) an aqueous medium, wherein the CMP composition (Q) has a pH of from 7 to 10.

A manufacturing method of a through substrate via includes at least the following steps. A protective liner is formed within an opening of a dielectric layer, where the opening exposes a portion of a semiconductor substrate underlying the dielectric layer. The portion of the semiconductor substrate is removed through the opening, where an overhang portion is formed at a top edge of the semiconductor substrate and masked by the protective liner after the removing. The overhang portion of the semiconductor substrate, the protective liner, and a portion of the dielectric layer adjoining the protective liner is removed to form a via hole. A conductive material is formed in the via hole.

A manufacturing method of a through substrate via includes at least the following steps. A protective liner is formed within an opening of a dielectric layer, where the opening exposes a portion of a semiconductor substrate underlying the dielectric layer. The portion of the semiconductor substrate is removed through the opening, where an overhang portion is formed at a top edge of the semiconductor substrate and masked by the protective liner after the removing. The overhang portion of the semiconductor substrate, the protective liner, and a portion of the dielectric layer adjoining the protective liner is removed to form a via hole. A conductive material is formed in the via hole.