Patent classifications
H01L21/463
Semiconductor device and method for manufacturing the semiconductor device
First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.
Semiconductor device and method for manufacturing the semiconductor device
First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.
Method for manufacturing semiconductor substrate
Provided is a method for manufacturing a semiconductor substrate including: preparing a semiconductor substrate having a front surface on which an epitaxial layer has been formed; and forming a fracture layer on a rear surface of the semiconductor substrate before forming elements on the epitaxial layer.
Method for manufacturing semiconductor substrate
Provided is a method for manufacturing a semiconductor substrate including: preparing a semiconductor substrate having a front surface on which an epitaxial layer has been formed; and forming a fracture layer on a rear surface of the semiconductor substrate before forming elements on the epitaxial layer.
Methods for polishing semiconductor substrates that adjust for pad-to-pad variance
Methods for polishing semiconductor substrates that involve adjusting the finish polishing sequence based on the pad-to-pad variance of the polishing pad are disclosed.
Methods for polishing semiconductor substrates that adjust for pad-to-pad variance
Methods for polishing semiconductor substrates that involve adjusting the finish polishing sequence based on the pad-to-pad variance of the polishing pad are disclosed.
Wafer grinding apparatus and wafer grinding method
A wafer grinding apparatus performs grinding processing for grinding a semiconductor wafer with a grindstone. The grindstone has a wear rate as a characteristic. The wear rate is 5% or more, and less than 200%. A determination part performs determination processing for determining whether a grinding state with respect to the semiconductor wafer is abnormal or normal, based on at least one of a load current of a motor and a grinding wear amount.
Wafer grinding apparatus and wafer grinding method
A wafer grinding apparatus performs grinding processing for grinding a semiconductor wafer with a grindstone. The grindstone has a wear rate as a characteristic. The wear rate is 5% or more, and less than 200%. A determination part performs determination processing for determining whether a grinding state with respect to the semiconductor wafer is abnormal or normal, based on at least one of a load current of a motor and a grinding wear amount.
PROCESS OF MAKING COMPONENTS FOR ELECTRONIC AND OPTICAL DEVICES USING LASER PROCESSING INCLUDING ABLATION
The present invention relates to processes of making components for electronic and optical devices using laser processing and devices comprising such components. Such process uses a laser to introduce chemical and/or structural changes in substrates and films that are the raw materials from which components for electronic and optical devices are made. Such process yields components that can have one or more electronic and/or optical functionalities that are integrated on the same substrate or film. In addition, such process does not require large-scale clean rooms and is easily configurable. Thus, rapid device prototyping, design change and evolution in the lab and on the production side is realized.
PROCESS OF MAKING COMPONENTS FOR ELECTRONIC AND OPTICAL DEVICES USING LASER PROCESSING INCLUDING ABLATION
The present invention relates to processes of making components for electronic and optical devices using laser processing and devices comprising such components. Such process uses a laser to introduce chemical and/or structural changes in substrates and films that are the raw materials from which components for electronic and optical devices are made. Such process yields components that can have one or more electronic and/or optical functionalities that are integrated on the same substrate or film. In addition, such process does not require large-scale clean rooms and is easily configurable. Thus, rapid device prototyping, design change and evolution in the lab and on the production side is realized.