A semiconductor device and a lead frame. The semiconductor device comprises at least one semiconductor chip that is attached to a surface of a base island in a first plane, wherein a connecting rib is connected to the base island, and has a first part which is obliquely connected to the base island; the connecting rib has a second part, and the second part has a surface in a second plane; the second plane is parallel to the first plane and is a plane different from the first plane; the connecting rib has a branch part divided from the second part and the branch part has, in the second plane, a surface used for receiving a lead connected to the semiconductor chip; and the branch part has an edge which is distant from a first edge of the base island by a first distance.

A semiconductor chip is arranged over a substrate in the form of a leadframe. A set of current-carrying formations configured as conductive ribbons are coupled to the semiconductor chip. The substrate does not include electrically conductive formations for electrically coupling the conductive ribbons to each other. Electrical contacts are formed via wedge bonding, for instance, between adjacent ones of the conductive ribbons so that a contact is provided between the adjacent ones of the conductive ribbons in support of a multi-formation current-carrying channel.

A semiconductor device is provided, including a leadframe, a die attached to the leadframe using a first solder, a source clip and a gate clip attached to the die using a second solder, and a drain clip attached to the leadframe. The semiconductor device is inverted, so that the source clip and the gate clip are positioned on the bottom side of the semiconductor device, and the leadframe is positioned on the top side of the semiconductor device so that the leadframe is a top exposed drain clip. The source clip and/or the drain clip comprise a half cut locking feature. The half cut locking feature can be formed as a wing and located at the sides of the source clip and the gate clip.

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.

A method for packaging an integrated circuit chip includes the steps of: a) providing a plurality of dies and a lead frame which includes a plurality of bonding parts each having a die pad, a plurality of leads each having an end region disposed on and connected to the die pad, and a plurality of bumps each disposed on the end region of a respective one of the leads; b) transferring each of the dies to the die pad of a respective one of the bonding parts to permit each of the dies to be flipped on the respective bonding part; and c) hot pressing each of the dies and the die pad of a respective one of the bonding parts to permit each of the dies to be bonded to the bumps of the respective bonding part.

A power module includes a metal frame having a first and second device attach pads, first and second semiconductor packages each having an encapsulant body, a die pad exposed at a lower surface of the encapsulant body, a plurality of leads protruding out from the encapsulant body, and a potting compound that encapsulates both of the first and second semiconductor packages and partially covers the metal frame. The first semiconductor package is mounted on the metal frame such that the die pad of the first semiconductor package faces and electrically contacts the first device attach pad. The second semiconductor package is mounted on the metal frame such that the die pad of the second semiconductor package faces and electrically contacts the second device attach pad. The plurality of leads from each of the first and second semiconductor packages are electrically accessible from outside of the potting compound.

A method of forming a semiconductor device includes providing a substrate that comprises a metal region, forming an encapsulant body of electrically insulating material on an upper surface of the metal region, forming an opening in the encapsulant body, and inserting a press-fit connector into the opening, wherein after inserting the press-fit connector into the opening, the press-fit connector is securely retained to the substrate and an interfacing end of the press-fit connector is electrically accessible.

An optoelectronic component includes a first housing body and a second housing body separate from the first housing body. A first section of a leadframe is embedded into the first housing body. A second section of the leadframe connected integrally the first section, is embedded into the second housing body.

A semiconductor device package and a method for packaging the same are provided. A semiconductor device package includes a carrier, an electronic component, a buffer layer, a reinforced structure, and an encapsulant. The electronic component is disposed over the carrier and has an active area. The buffer layer is disposed on the active area of the electronic component. The reinforced structure is disposed on the buffer layer. The encapsulant encapsulates the carrier, the electronic component and the reinforced structure.