A method of manufacturing a cascode HEMT semiconductor device including a lead frame, a die pad with an indentation attached to the lead frame, and a HEMT die attached to the die pad. The HEMT die includes a HEMT source and a HEMT drain on a first side, and a HEMT gate on a second side. The device further includes a MOSFET die attached to the source of the HEMT die, and the MOSFET die includes a MOSFET source, a MOSFET gate and a MOSFET drain. The MOSFET drain is connected to the HEMT source, and the MOSFET source includes a MOSFET source clip. The MOSFET source clip includes a pillar so to connect the MOSFET source to the HEMT gate, and the connection between the MOSFET source to the HEMT gate is established by a conductive material.

A method of forming a semiconductor device includes providing a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, mounting one or more semiconductor dies on a portion of the structured metallization layer, forming an encapsulant body of electrically insulating material that covers the power electronics carrier and encapsulates the one or more semiconductor dies, securing a press-fit connector to the power electronics carrier with a base portion of the press-fit connector being disposed within an opening in the encapsulant body and with an interfacing end of the press-fit connector being electrically accessible from outside the encapsulant body.

Semiconductor packages and methods for manufacturing are disclosed. In one example, a method for manufacturing a semiconductor package includes providing an electrically conductive chip carrier including a mounting surface and a protrusion extending out of the mounting surface. At least one semiconductor chip is arranged on the mounting surface. The method further includes encapsulating the protrusion and the at least one semiconductor chip in an encapsulation material, wherein surfaces of the protrusion and the at least one semiconductor chip facing away from the mounting surface remain uncovered by the encapsulation material. An electrical redistribution layer is formed over the surfaces of the protrusion and the at least one semiconductor chip facing away from the mounting surface. The electrical redistribution layer provides an electrical connection between the protrusion and the at least one semiconductor chip.

A semiconductor device comprises: one or more semiconductor dice arranged on a substrate such as a leadframe, an insulating encapsulation of, e.g., LDS material molded onto the semiconductor die or dice arranged on the substrate, the encapsulation having a surface opposite the substrate, and electrically conductive formations (e.g., die-to-lead 181, 182, 183 or die-to-die 201, 202) provided in the encapsulation and coupled to the semiconductor die or dice arranged on the substrate. A tape is laminated onto the surface of the encapsulation opposite the substrate and electrically conductive contacts to the electrically conductive formations extend through the tape laminated onto the encapsulation. The length of the electrically conductive contacts is thus reduced to the thickness of the tape laminated onto the encapsulation, thus facilitating producing, e.g., “vertical” MOSFET power devices having a reduced drain-source “on” resistance, RDS.sub.ON.

The present disclosure is directed to semiconductor packages manufactured utilizing a leadframe with varying thicknesses. The leadframe with varying thicknesses has a reduced likelihood of deformation while being handled during the manufacturing of the semiconductor packages as well as when being handled during a shipping process. The method of manufacturing is not required to utilize a leadframe tape based on the leadframe with varying thicknesses. This reduces the overall manufacturing costs of the semiconductor packages due to the reduced materials and steps in manufacturing the semiconductor packages as compared to a method that utilizes a leadframe tape to support a leadframe. The semiconductor packages may include leads of varying thicknesses formed by utilizing the leadframe of varying thicknesses to manufacture the semiconductor packages.

In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions; at least one semiconductor device die over the die mount portion of the package substrate, the semiconductor device die having bond pads on an active surface facing away from the package substrate; electrical connections between at least one of the bond pads and one of the lead portions; a post interconnect over at least one of the bond pads, the post interconnect extending away from the active surface of the semiconductor device die; and a dielectric material covering a portion of the package substrate, the semiconductor device die, a portion of the post interconnect, and the electrical connections, forming a packaged semiconductor device, wherein the post interconnect extends through the dielectric material and had an end facing away from the semiconductor device die that is exposed from the dielectric material.

The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.

A semiconductor device includes: a semiconductor element; a mold member covering the semiconductor element; and a first terminal and a second terminal electrically connected to the semiconductor element, protruding from one side of the mold member, and alternating along the one side. The first terminal includes a first bend, and the second terminal includes: a second bend located further from the one side of the mold member than the first bend, and having the same width as the first bend in plan view.

The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.

In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.