Patent classifications
H01L21/4828
Manufacturing method of chip package structure
A manufacturing method of a chip package structure includes following steps. A substrate including a first metal layer, a second metal layer, and an insulation layer located between the first and the second metal layers is provided. A first groove is formed in the first metal layer to form a chip pad and bonding pads. The bonding pads are respectively located in recesses of the chip pad. A second groove is formed in the second metal layer to form a heat-dissipation block and terminal pads. The terminal pads are respectively located in recesses of the heat-dissipation block. Conductive vias are formed to connect the corresponding terminal pads and electrically connect the bonding pads with the terminal pads. A chip is disposed on the chip pad and electrically connected to the bonding pads. An encapsulant covering the chip is formed.
Lead frame and method for manufacturing the same
A metal plate 1 to be a lead frame has a plating with Sn or Zn or a plating with various alloys containing these metals only on the side faces and half-etched faces 6, and a noble metal plating layer formed on the front surface as a surface on which a semiconductor device is to be mounted.
Semiconductor lead frame, semiconductor package, and manufacturing method thereof
A semiconductor lead frame includes a metal plate and a semiconductor chip mounting area provided on a top surface of the metal plate. A first plating layer for an internal terminal is provided around the semiconductor chip mounting area. A second plating layer for an external terminal is provided on a back surface of the metal plate at a location opposite to the semiconductor chip mounting area. The first plating layer includes a fall-off prevention structure for preventing the first plating layer from falling off from an encapsulating resin when the top surface of the metal plate is encapsulated in the encapsulating resin. The second plating layer does not include the fall-off prevention structure.
LEAD FRAME AND SEMICONDUCTOR DEVICE
A light emitting device includes a resin package and a light emitting element. The resin package has a cavity. The resin package includes first and second lead portions and a resin member. The first lead portion includes a first lead side surface and a lead recess portion that extends from the first lead side surface in a direction away from the second lead portion, with a part of the resin member being arranged within the lead recess portion. The light emitting element includes first and second electrodes that respectively face the first and second lead portions. The first electrode includes a first electrode side surface and an electrode recess portion that extends from the first electrode side surface in a direction away from the second electrode. The electrode recess portion is arranged at a position overlapping the lead recess portion in a plan view.
METAL MEMBER AND MANUFACTURING METHOD FOR METAL MEMBER
A manufacturing method for a metal member includes irradiating a first region of a surface of the base material, the surface having at least any one of Cu, Al, Sn, Ti, and Fe, as a main component, with a laser beam to melt the first region; generating metal particles from a vapor or plasma of a metal released to a predetermined atmosphere by melting the surface of the base material in the first region, and depositing the metal particles in the first region; irradiating a second region adjacent to the first region with a laser beam to melt the second region; and generating metal particles from a vapor or plasma of a metal released to a predetermined atmosphere by melting the surface of the base material in the second region, and depositing the metal particles in each of the first region and the second region.
Recess lead for a surface mount package
A lead for a surface mount package for a semiconductor device, and the surface mount package employing the same. In one example, the lead includes a central segment with a first side and a second side, a first extension from a portion of the first side, and a second extension from a portion of the second side. The lead also includes a recess extending through a portion of the central segment, the first extension and the second extension.
Systems and methods for lead frame locking design features
Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.
Housing for an Optical Component, Assembly, Method for Producing a Housing and Method for Producing an Assembly
A housing for an optical component is provided in various embodiments. The housing has a leadframe section and a mold compound. The leadframe section is formed from an electrically conductive material and has a first side and a second side facing away from the first side. On the first side, the leadframe section has at least one first receiving region for receiving the optical component and/or at least one contact region for electrically contacting the optical component. The leadframe section has at least one trench which is formed in the leadframe section on the first side thereof alongside the receiving region and/or the contact region. The leadframe section is embedded in the mold compound. The mold compound has at least one receiving recess in which the first receiving region and/or the contact region and the trench are arranged.
Substrate structure, semiconductor package device, and manufacturing method of semiconductor package
A substrate structure, a semiconductor package and a manufacturing method of semiconductor package are provided. The substrate structure comprises a conductive structure, an electrical component, a package body and a ring-shaped conductive structure. The conductive structure comprises a first conductive layer and a second conductive layer. The first conductive layer has a lower surface. The second conductive layer and the electrical component are formed on the lower surface of the first conductive layer. The package body encapsulates the conductive structure and the electrical component and has an upper surface. The ring-shaped conductive structure surrounds the conductive structure and the electrical component and is disposed at the edge of the upper surface of the package body to expose the conductive structure.
Packaged device with extended structure for forming an opening in the encapsualant
A packaged device includes an extended structure located at a major side of the packaged device. The extended structure defines an outer area that includes encapsulated material on the major side and an inner area where there is a lack of encapsulant over a portion of the device at the major side. The extended structure prevents encapsulant from getting into the inner area during the encapsulating process.