The present disclosure describes a method of forming an epitaxial layer on a substrate in a chamber. The method includes cleaning the chamber with a first etching gas and depositing the epitaxial layer on the substrate. Deposition of the epitaxial layer includes epitaxially growing a first portion of the epitaxial layer with a precursor, cleaning the substrate and the chamber with a flush of a second etching gas different from the first etching gas, and epitaxially growing a second portion of the epitaxial layer with the precursor. The first portion and the second portion have the same composition. The method furthers includes etching a portion of the epitaxial layer with a third etching gas having a flow rate higher than that of the second etching gas.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

A semiconductor device includes a die paddle, a plurality of electrically conductive leads extending away from the die paddle, and an adhesion promoter plating material selectively formed on the electrically conductive leads such that outer portions of the leads are covered by the adhesion promoter plating material, and interior portions of the leads that are disposed between the die paddle and the respective outer portions of each lead are substantially devoid of the adhesion promoter plating material.

A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away from the die paddle. A first one of the unit lead frames is plated with an adhesion promoter plating material within a package outline area of the first unit lead frame. The package outline area includes one of the die paddles and interior portions of the leads. Wire bond sites are processed in the first unit lead frame before or after the plating of the first lead frame such that, after the plating of the first lead frame. The wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area at an end of the interior portions of the leads that is closest to the die paddle.

Methods, systems and devices are disclosed for performing a semiconductor processing operation. In some embodiments this includes configuring a wire bonding machine to perform customized movements with a capillary tool of the wire bonding machine, etching bulk contaminants over one or more locations of a semiconductor device with the capillary tool, and applying plasma to the semiconductor device to remove residual contaminants.

An anti-plasma adhesive tape utilized for manufacturing a semiconductor package includes a substrate; and an adhesive layer formed on the substrate, wherein the adhesive layer is selected from a group composed of acrylic adhesive, light-curable resin and photoinitiator. The anti-plasma adhesive tape is attached to a backside of a lead frame of the semiconductor package before a plasma-cleaning process and removed from the lead frame after a molding process. After the anti-plasma adhesive tape is cured by irradiating an energy ray and removed from the lead frame, there is no residual adhesive left on a molding compound of the semiconductor package.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

An anti-plasma adhesive tape utilized for manufacturing a semiconductor package includes a substrate; and an adhesive layer formed on the substrate, wherein the adhesive layer is selected from a group composed of acrylic adhesive, light-curable resin and photoinitiator. The anti-plasma adhesive tape is attached to a backside of a lead frame of the semiconductor package before a plasma-cleaning process and removed from the lead frame after a molding process. After the anti-plasma adhesive tape is cured by irradiating an energy ray and removed from the lead frame, there is no residual adhesive left on a molding compound of the semiconductor package.

A semiconductor device package includes a copper lead frame, a copper oxide compound layer and an encapsulant. The copper oxide compound layer is in contact with a surface of the copper lead frame. The copper oxide compound layer includes a copper(II) oxide, and a thickness of the copper oxide compound layer is in a range from about 50 nanometers to about 100 nanometers. The encapsulant is in contact with a surface of the copper oxide compound layer.

Embodiments of the invention provide a processing system and a method for processing with a heated etching solution. In one example, tight control over temperature and hydration level of an acidic etching solution is provided. According to one embodiment, the method includes forming the heated etching solution in a first circulation loop, providing the heated etching solution in the process chamber for treating a substrate, forming an additional heated etching solution in a second circulation loop, and supplying the additional heated etching solution to the first circulation loop. According to one embodiment, the processing system includes a process chamber for treating the substrate with the heated etching solution, a first circulation loop for providing the heated etching solution into the process chamber, and a second circulation loop for forming an additional heated etching solution and supplying the additional heated etching solution to the first circulation loop.