A method for producing a metal-ceramic substrate with a plurality of electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into a plurality of holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500° C. in which the copper oxide forms a copper body in the plurality of holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

A semiconductor die package is provided. The semiconductor die package includes a package substrate, and a first semiconductor die and a second semiconductor die disposed thereon. A ring structure is attached to the package substrate and surrounds the semiconductor dies. A lid structure is attached to the ring structure and disposed over the semiconductor dies, and has an opening exposing the second semiconductor die. A heat sink is disposed over the lid structure and has a portion extending into the opening of the lid structure. A first thermal interface material (TIM) layer is interposed between the lid structure and the first semiconductor die. A second TIM layer is interposed between the extending portion of the heat sink and the second semiconductor die. The first TIM layer has a thermal conductivity higher than the thermal conductivity of the second TIM layer.

A heat dissipation apparatus includes a vapor chamber and multiple flow field fins. The vapor chamber includes a lower plate part and an upper plate part. The lower plate part includes multiple flow channels, a first and a second confluence areas formed on the flow channels. The upper plate part covers on the lower plate part to enclose the flow channels, the first and second confluence areas. Each flow field fin includes an inlet channel, an outlet channel, and a circuitous channel. The inlet channel communicates with the first confluence area, the outlet channel communicates with the second confluence area, and the circuitous channel communicates between the inlet channel and the outlet channel in a single flow direction. The flow field fins are collectively as an inlet surface at one side adjacent to the outlet channel and as an outlet surface at another side adjacent to the inlet channel.

Disclosed embodiments include multiple thermal-interface material at the interface between an integrated heat spreader and a heat sink. A primary thermal-interface material has flow qualities and a secondary thermal-interface material has containment and adhesive qualities. The integrated heat spreader has a basin form factor that contains the primary thermal-interface material.

An electronic device, including a substrate and a stack of dies stacked on the substrate. The stack of dies includes: (a) one or more functional dies, the functional dies including functional electronic circuits and being configured to exchange electrical signals at least with the substrate, and (b) one or more dummy dies, the dummy dies being disposed among dies forming the stack and being configured to: (i) dissipate heat generated by the one or more functional dies and (ii) pass electrical signals exchanged between the substrate and the one or more functional dies or between two or more of the functional dies.

An aluminum heat exchanger includes first and second plates with inner and outer surfaces, which are joined by brazing and define at least one fluid flow passage. The first and second plates each comprise a core layer of aluminum or an aluminum alloy having a melting temperature greater than an aluminum brazing temperature. The first plate also includes a first outer clad layer defining the outer surface of the first plate. The first outer clad layer is solderable to a metal layer of an object to be cooled and includes nickel or copper. A second outer clad layer is located between the first outer clad layer and the core layer and is roll bonded to at least the second outer clad layer. A manufacturing method includes brazing first and second plates, where the layers of the first plate are roll bonded and the first plate is optionally formed before brazing.

This application is directed to cooling a semiconductor system. The semiconductor system includes a device substrate having a first surface and a second surface, an electronic component thermally coupled to the device substrate, and a cooling substrate coupled to the device substrate. The cooling substrate includes a third surface facing the second surface of the device substrate, a fourth surface opposite the third surface, and a plurality of vias between the third and fourth surfaces. The second surface and the third surface define a cavity therebetween, such that in use coolant flows from the fourth surface through the plurality of vias to exit at the third surface, enters the cavity between the second and third surfaces, and impinges on the second surface. At least a portion of one or more of the device substrate and the cooling substrate have similar coefficients of thermal expansion.

A power semiconductor apparatus includes a mold portion, a panel that is conductive and in a flat plate shape, and a plurality of fins. The mold portion includes a power semiconductor element and a base plate that are molded. An opening is formed in the panel into which the base plate is inserted. The plurality of fins is fixed in grooves of the base plate. The panel has a plurality of protrusions on side surfaces forming the opening. Each protrusion has a fifth surface a cross section of which has a shape that tapers down toward an end of the protrusion, the cross section being parallel to a plane extending in the Z direction and a direction in which the protrusion protrudes. The base plate has cover portions covering the fifth surfaces, and is plastically deformed to allow the panel to be fitted in the base plate to fill gaps.

Embodiments include a reflowable grid array (RGA) interposer, a semiconductor packaged system, and a method of forming the semiconductor packaged system. The RGA interposer includes a plurality of heater traces in a substrate. The RGA interposer also includes a plurality of vias in the substrate. The vias extend vertically from the bottom surface to the top surface of the substrate. The RGA interposer may have one of the vias between two of the heater traces, wherein the vias have a z-height that is greater than a z-height of the heater traces. The heater traces may be embedded in a layer of the substrate, where the layer of the substrate is between top ends and bottom ends of the vias. Each of the plurality of heater traces may include a via filament interconnect coupled to a power source and a ground source. The heater traces may be resistive heaters.

A thermal bridge includes an upper bridge assembly including upper plates arranged in an upper plate stack and a lower bridge assembly including lower plates arranged in a lower plate stack. The thermal bridge includes upper spring elements extending from upper plates having upper mating interfaces engaging lower plates to bias the upper plates in a first biasing direction generally away from the lower bridge assembly. The thermal bridge includes lower spring elements extending from lower plates having lower mating interfaces engaging upper plates to bias the lower plates in a second biasing direction generally away from the upper bridge assembly. A bridge frame having connecting elements extends through the upper plates and the lower plates to hold the upper plates in the upper plate stack and to hold the lower plates in the lower plate stack.