Patent classifications
H01L21/67069
ETCHING METHOD AND ETCHING DEVICE
An etching method of supplying etching gases to a substrate to etch a surface of the substrate, includes a protection step of supplying amine gas to the substrate having an oxygen-containing silicon film to form a protective film for preventing etching by the etching gases on a surface of the oxygen-containing silicon film, for protecting the oxygen-containing silicon film, and a first etching step of supplying a first etching gas, which is one of the etching gases and is a fluorine-containing gas, and the amine gas to the substrate to etch the oxygen-containing silicon film.
INERT GAS IMPLANTATION FOR HARD MASK SELECTIVITY IMPROVEMENT
An amorphous carbon hard mask is formed having low hydrogen content and low sp3 carbon bonding but high modulus and hardness. The amorphous carbon hard mask is formed by depositing an amorphous carbon layer at a low temperature in a plasma deposition chamber and treating the amorphous carbon layer to a dual plasma-thermal treatment. The dual plasma-thermal treatment includes exposing the amorphous carbon layer to inert gas plasma for implanting an inert gas species in the amorphous carbon layer and exposing the amorphous carbon layer to a high temperature. The amorphous carbon hard mask has high etch selectivity relative to underlying materials.
IN-FEATURE WET ETCH RATE RATIO REDUCTION
Various embodiments herein relate to methods and apparatus for depositing silicon oxide using thermal ALD or thermal CVD. In one aspect of the disclosed embodiments, a method for depositing silicon oxide is provided, the method including: (a) receiving the substrate in a reaction chamber; (b) introducing a first flow of a first reactant into the reaction chamber and exposing the substrate to the first reactant, where the first reactant includes a silicon-containing reactant; (c) introducing a second flow of a second reactant into the reaction chamber to cause a reaction between the first reactant and the second reactant, (i) where the second reactant includes hydrogen (H2) and an oxygen-containing reactant, (ii) where the reaction deposits silicon oxide on the substrate, and (iii) where the reaction is initiated when a pressure in the reaction chamber is greater than 10 Torr and equal to or less than about 40 Torr.
FLAT BOTTOM SHADOW RING
In some examples, a flat Bottom Shadow Ring (fBSR) is provided for processing a substrate in a processing chamber. An example fBSR comprises an overhang for covering an edge of the substrate in the processing chamber. The overhang includes a fiat zone that extends radially outward over the outer edge of the substrate.
COMPONENT FOR FILM FORMATION APPARATUS OR ETCHING APPARATUS
A component for a film formation apparatus or an etching apparatus used for manufacturing semiconductors, the component including a disk-shaped or ring-shaped SiC film having an outer diameter of 300 mm or more and a thickness of 3 mm or more. The component does not include an interface extending perpendicularly to a thickness direction of the SiC film on an exposed side surface of the SiC film.
Learning method, management device, and management program
There is provided a learning method. The method includes performing preprocessing on light emission data in a chamber of a plasma processing apparatus, setting a constraint for generating a regression equation representing a relationship between an etching rate of the plasma processing apparatus and the light emission data, selecting a learning target wavelength from the light emission data subjected to the preprocessing, and receiving selection of other sensor data different from the light emission data. The method further includes generating a regression equation based on the set constraint while using, as learning data, the selected wavelength, the received other sensor data, and the etching rate, and outputting the generated regression equation.
SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
A substrate processing method includes providing a substrate with a silicon-containing film in a chamber, supplying a process gas containing an HF gas, a phosphorus halide gas, and at least one gas selected from the group consisting of a C.sub.4H.sub.2F.sub.6 gas, a C.sub.4H.sub.2F.sub.8 gas, a C.sub.3H.sub.2F.sub.4 gas, and a C.sub.3H.sub.2F.sub.6 gas into the chamber to generate plasma, and etching the silicon-containing film in the substrate.
Plasma processing method
A plasma processing system includes a chamber, a gas supply unit, a gas exhaust unit, a separating unit, a boost unit and an accumulation unit. The chamber is configured to process a target substrate by plasma of a gaseous mixture of a rare gas and a processing gas. The gas supply unit is configured to supply the rare gas and the processing gas into the chamber. The gas exhaust unit is configured to exhaust a gas containing the rare gas from the chamber. The separating unit is configured to separate the rare gas from the gas exhausted by the gas exhaust unit. The boost unit is configured to boost the rare gas separated by the separating unit. The accumulation unit is configured to accumulate the rare gas boosted by the boost unit and supply the accumulated first rare gas to the gas supply unit.
Metal etching with in situ plasma ashing
In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.
Semiconductor processing chambers for deposition and etch
Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.