An apparatus for semiconductor processing is provided. The apparatus includes a housing comprising a plurality of shelves configured to receive a plurality of substrates; a shelter plate disposed over an upper side of the housing and configured to reduce heat loss of an upper substrate of the plurality of substrates; and an airflow structure in the housing and configured to control an air circulation in the housing.

There is provided a substrate support supporting a substrate comprising a base, a first ceramic layer on the base, and a second ceramic layer above the first ceramic layer. The first ceramic layer has a first base portion made of a first ceramic, and a plurality of heater electrodes included in the first base portion and for adjusting a temperature of the substrate. The second ceramic layer has a second base portion made of a second ceramic different from the first ceramic, and a chucking electrode included in the second base portion and for holding the substrate.

Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.

A method includes determining, based on sensor data, that one or more components of substrate processing equipment are within a pre-failure window that is after a normal operation window. Corresponding data points in the normal operation window are substantially stable along a first health index value. The corresponding data points in the pre-failure window increase from the first health index value to a peak at a second health index value. Responsive to the determining that the one or more components are within the pre-failure window, the method further includes causing performance of a corrective action associated with the one or more components of the substrate processing equipment.

Embodiments described herein relate to a substrate support assembly which enables a cryogenic temperature operation of an electrostatic chuck (ESC) so that a substrate disposed thereon is maintained at a cryogenic processing temperature suitable for processing while other surfaces of a processing chamber are maintained at a different temperature. The substrate support assembly includes an electrostatic chuck (ESC), an ESC base assembly coupled to the ESC having a refrigerant channel disposed therein, and a facility plate having a coolant channel disposed therein. The facility plate includes a plate portion and a flange portion. The plate portion is coupled to the ESC base assembly and the flange portion coupled to the ESC with a seal assembly. A vacuum region is defined by the ESC, the ESC base assembly, the plate portion of the facility plate, the flange portion of the facility plate, and the seal assembly.

A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.

A device and a method for manufacturing a thin film are provided. The device includes: a chamber; a substrate carrying member arranged within the chamber and configured to carry thereon a substrate on which the thin film is to be formed; a mask fixation member configured to fix a mask, wherein the mask includes a shielding region and an opening region, and a material for forming the thin film is allowed to pass through the opening region; and a position adjustment member configured to adjust a distance between the mask and the substrate to form the thin films of different sizes on the substrate, wherein orthogonal projections of the thin films of different sizes onto the substrate have different areas.

Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece into a process chamber; vaporizing a solvent to create a vaporized solvent; introducing the vaporized solvent into the process chamber; and exposing the workpiece to the vaporized solvent.

Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.