Indium gallium zinc oxide can be etched by providing a wafer having a layer of indium gallium zinc oxide to a processing chamber, heating the wafer to a first temperature, flowing a first chemical species comprising a fluoride to create a layer of indium gallium zinc oxyfluoride, and removing the layer of indium gallium zinc oxyfluoride by flowing a second chemical species comprising an alkyl aluminum halide, an aluminum alkalide, an organoaluminium compound, a diketone, silicon halide, silane, halogenated silane, or alkyl silicon halide.

Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

In a substrate processing method, a substrate with a pattern including a plurality of structures is processed. The substrate processing method includes a step of increasing hydrophilicity of respective surfaces of the structures, by executing predetermined processing on the structures with a non-liquid substance, from that before execution of the predetermined processing; and a step of supplying a processing liquid to the structures after the step of increasing hydrophilicity.

Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.

Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

Exemplary processing methods may include forming a first deposition plasma of a silicon-and-nitrogen-containing precursor. The methods may include depositing a first portion of a silicon nitride material on a semiconductor substrate with the first deposition plasma. A first treatment plasma of a helium-and-nitrogen-containing precursor may be formed to treat the first portion of the silicon nitride material with the first treatment plasma. A second deposition plasma may deposit a second portion of a silicon nitride material, and a second treatment plasma may treat the second portion of the silicon nitride material. A flow rate ratio of helium-to-nitrogen in the first treatment plasma may be lower than a He/N.sub.2 flow rate ratio in the second treatment plasma. A first power level from a plasma power source that forms the first treatment plasma may be lower than a second power level that forms the second treatment plasma.

A heated chuck for an ion implantation system selectively clamps a workpiece to a carrier plate having heaters to selectively heat a clamping surface. A gap between a base plate and carrier plate of the heated chuck contains a heat transfer media. A cooling fluid source is coupled to cooling channels in the base plate. A controller operates the heated chuck in a first mode and second mode. In the first mode, the controller does not activate the heaters and flows the cooling fluid through the cooling channel, where heat is transferred through the heat transfer media and to the cooling fluid. In the second mode, the controller activates the heaters and optionally purges the cooling fluid from the cooling channel or otherwise alters its cooling capacity. A gas can be selectively provided in the gap to further control heat transfer in the first and second modes.

An apparatus may include a clamp to clamp a substrate wherein the clamp is arranged opposing a back side of the substrate; and an illumination system, disposed to direct radiation to the substrate, when the substrate is disposed on the clamp, wherein the radiation comprises a radiation energy equal to or above a threshold energy to generate mobile charge in the substrate, where the illumination system is disposed to direct radiation to a front side of the substrate, opposite the back side of the substrate.

A method and a system. The system may include (a) evaluation units, (b) an object distribution system for receiving the objects and distributing the objects between the evaluation units, and (c) at least one controller. Each evaluation unit may include (i) a chamber housing that has an inner space, (ii) a chuck, (iii) a movement system that is configured to move the chuck, and (iv) a charged particle module that is configured to irradiate the object with a charged particle beam, and to detect particles emitted from the object. In each evaluation unit a length of the inner space is smaller than twice a length of the object, and a width of the inner space is smaller than twice a width of the object.

A process of preparing a wafer having a diameter of two inches or more, at least a surface of the wafer being formed from a group III nitride crystal, including preparing an alkaline or acidic etching liquid containing a peroxodisulfate ion as an oxidizing agent that accepts an electron, accommodating the wafer such that the surface of the wafer is immersed in the etching liquid such that the surface of the wafer is parallel with a surface of the etching liquid; and radiating light from the surface side of the etching liquid onto the surface of the wafer without agitating the etching liquid. First and second etching areas disposed at an interval from each other are defined on the surface of the wafer. In the process of radiating the light onto the surface of the wafer, the light is radiated perpendicularly onto surfaces of the first and second etching areas.