H01L21/67225

HIGH ELECTRON MOBILITY TRANSISTOR AND FABRICATION METHOD THEREOF
20220093778 · 2022-03-24 ·

A high-electron mobility transistor includes a substrate; a channel layer on the substrate; a AlGaN layer on the channel layer; and a P—GaN gate on the AlGaN layer. The AlGaN layer comprises a first region and a second region. The first region has a composition that is different from that of the second region.

MOVABLE ELECTRODE FOR PROCESS CHAMBER
20220093436 · 2022-03-24 ·

A process chamber is provided including a chamber body enclosing an inner volume; a substrate support disposed in the inner volume; an electrode disposed above the substrate support; and an actuator configured to move the electrode in the process chamber to change a distance between the electrode and the substrate support.

Apparatus for UV flowable dielectric

Provided are methods and apparatus for ultraviolet (UV) assisted capillary condensation to form dielectric materials. In some embodiments, a UV driven reaction facilitates photo-polymerization of a liquid phase flowable material. Applications include high quality gap fill in high aspect ratio structures and pore sealing of a porous solid dielectric film. According to various embodiments, single station and multi-station chambers configured for capillary condensation and UV exposure are provided.

Semiconductor fabrication system embedded with effective baking module

The present disclosure provides a semiconductor fabrication apparatus. The semiconductor apparatus includes a processing chamber for etching; a substrate stage integrated in the processing chamber and being configured to secure a semiconductor wafer; a reflective mirror configured inside the processing chamber to reflect thermal energy from the heating mechanism toward the semiconductor wafer; and a heating mechanism embedded in the process chamber and is operable to perform a baking process to remove a by-product generated during the etching. The heating mechanism is integrated between the reflective mirror and a gas distribution plate of the processing chamber.

UNDERLAYER FOR PHOTORESIST ADHESION AND DOSE REDUCTION

This disclosure relates generally to a patterning structure including an underlayer and an imaging layer, as well as methods and apparatuses thereof. In particular embodiments, the underlayer provides an increase in radiation absorptivity and/or patterning performance of the imaging layer.

Substrate treating apparatus and substrate treating method

A substrate treating apparatus includes an indexer division, stories, and a controller. Each of the stories includes a first rack, a treating section, and a main transport mechanism. The indexer division includes a carrier rack and a transport device. The transport device performs a feeding operation for transporting substrates from a carrier placed on the carrier rack to the first rack. The transport device further performs an inter-story transporting operation for transporting the substrates between two first racks provided for different stories.

Substrate treating apparatus and method for controlling substrate treating apparatus
11152242 · 2021-10-19 · ·

A second substrate transportation mechanism is generally set to transport a substrate from a substrate buffer unit to a FOUP placed on an opener. However, if a predetermined condition is satisfied, the second substrate transportation mechanism transports a substrate from the FOUP to the substrate buffer unit. That is, the second substrate transportation mechanism performs an operation different from an ordinary substrate transportation operation. Accordingly, a FOUP transportation mechanism can leave a specific FOUP at a placement position (opener) of the specific FOUP from when all the substrates are taken from the specific FOUP to when all the treated substrates are accommodated in the specific FOUP. Thus, the FOUP transportation mechanism can transport FOUPs except for the specific FOUP so that FOUP transportation efficiency can be enhanced.

Techniques for thermal treatment of electronic devices

Apparatus and techniques are described herein for use in manufacturing electronic devices. Such as can include organic light emitting diode (OLED) devices. Such apparatus and techniques can include using one or more modules having a controlled environment. For example, a substrate can be received from a printing system located in a first processing environment, and the substrate can be provided a second processing environment, such as to an enclosed thermal treatment module comprising a controlled second processing environment. The second processing environment can include a purified gas environment having a different composition than the first processing environment.

Thermal treatment apparatus, thermal treatment method, and non-transitory computer storage medium

A thermal treatment apparatus including a hot plate which heats a substrate mounted thereon, in a treatment chamber including a lid body covering a surface to be treated of the substrate mounted on the hot plate, the thermal treatment apparatus includes: a control unit which controls at least a temperature of the hot plate, and a temperature measuring unit which measures a temperature of the lid body, wherein the control unit is configured to perform, when a set temperature of the hot plate is changed, correction of a heating amount by the hot plate for obtaining the set temperature after change, based on the temperature of the lid body measured by the temperature measuring unit.

Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same

This disclosure relates to a method for using a high volume manufacturing system for processing and measuring workpieces in a semiconductor processing sequence without leaving the system's controlled environment (e.g., sub-atmospheric pressure). The system includes an active interdiction control system to implement corrective processing within the system when a non-conformity is detected. The corrective processing method can include a remedial process sequence to correct the non-conformity or compensate for the non-conformity during subsequent process. The non-conformity may be associated with fabrication measurement data, process parameter data, and/or platform performance data.