In a contact hole of an interlayer insulating film, a tungsten film forming a contact plug is embedded via a barrier metal. The interlayer insulating film is formed by sequentially stacked HTO and BPSG films. The BPSG film has an etching rate faster than that of the HTO film with respect to a hydrofluoric acid solution used in wet etching of preprocessing before formation of the barrier metal. After the contact hole is formed in the interlayer insulating film, a width of an upper portion of the contact hole at the BPSG film is increased in a step-like shape, to be wider than a width of a lower portion at the HTO film by the wet etching before the formation of the barrier metal, whereby an aspect ratio of the contact hole is reduced. Thus, size reductions and enhancement of the reliability may be realized.

A method of manufacturing a semiconductor structure includes a number of operations. A first oxide layer is provided on a semiconductor integrated circuit. A conductive layer of the semiconductor integrated circuit is exposed from a top surface of the first oxide layer. An etch stop layer is formed on the top surface of the first oxide layer. A second oxide layer is formed on the etch stop layer. A through via is formed extending through the second oxide layer and the etch stop layer to expose the conductive layer. Acid is provided on the conductive layer to form a protective layer on the conductive layer. The protective layer includes a compound of the acid and material of the conductive layer. A fence of the second oxide layer at an edge on the through via is removed at the through via by a hydrofluoric acid etching.

Embodiments disclosed herein describe methods of forming semiconductor devices. The methods may include etching vias and trenches in a middle-of-line (MOL) layer that has a low-k dielectric layer, a sacrificial nitride layer, and a hard mask layer. The methods may also include depositing a thin nitride layer within the via trench, depositing a carbon layer on the thin nitride layer within the vias and trenches, etching back the thin nitride layer to expose a portion of the hard mask layer, removing the hard mask layer and the carbon layer, and removing the thin nitride layer and the sacrificial nitride layer.

A method of gap filling a feature on a substrate decreases the feature-to-feature gap fill height variation by using a tungsten halide soak treatment. In some embodiments, the method may include heating a substrate to a temperature of approximately 350 degrees Celsius to approximately 450 degrees Celsius, exposing the substrate to a tungsten halide gas at a process pressure of approximately 5 Torr to approximately 25 Torr, soaking the substrate for a soak time of approximately 5 seconds to approximately 60 seconds with the tungsten halide gas, and performing a metal preclean process and a gap fill deposition on a plurality of features on the substrate after soaking of the substrate has completed.

Semiconductor devices and methods of manufacturing are provided. In some embodiments the method includes depositing an etch stop layer over a first hard mask material, the first hard mask material over a gate stack, depositing an interlayer dielectric over the etch stop layer, forming a first opening through the interlayer dielectric, the etch stop layer, and the first hard mask material, the first opening exposing a conductive portion of the gate stack, and treating sidewalls of the first opening with a first dopant to form a first treated region within the interlayer dielectric, a second treated region within the etch stop layer, a third treated region within the first hard mask material, and a fourth treated region within the conductive portion, wherein after the treating the fourth treated region has a higher concentration of the first dopant than the first treated region.

A semiconductor device includes a first dielectric layer over a device base layer, the first dielectric layer having a first opening with a first sidewall; a first interconnect segment extending through the first opening; and a cap layer over a top surface of the first interconnect segment, wherein the cap layer comprises a first metal, carbon, and nitrogen.

An integrated circuit device includes a substrate, a landing pad on the substrate, and a through-via structure passing through the substrate and connected to the landing pad. The through-via structure may include a conductive plug, a first conductive barrier layer covering a sidewall and a lower surface of the conductive plug, and a second conductive barrier layer covering a sidewall of the first conductive barrier layer.

The present disclosure describes a structure with a controlled polyimide profile and a method for forming such a structure. The method includes depositing, on a substrate, a photoresist containing polyimide and performing a first anneal at a first temperature. The method further includes exposing the photoresist to a radiation source through a photomask having a pattern associated with a shape of a polyimide opening. The method further includes performing a second anneal at a second temperature and removing a portion of the photoresist to form the polyimide opening. The method further includes performing a third anneal at a third temperature and cleaning the polyimide opening by ashing.

A process for forming cobalt on a substrate, comprising: volatilizing a cobalt precursor of the disclosure, to form, a precursor vapor: and contacting the precursor vapor with the substrate under vapor deposition conditions effective for depositing cobalt on the substrate from the precursor vapor, wherein the vapor deposition conditions include temperature not exceeding 200° C., wherein: the substrate includes copper surface and dielectric material, e.g., ultra-low dielectric material. Such cobalt deposition process can be used to manufacture product articles in which the deposited cobalt forms a capping layer, encapsulating layer, electrode, diffusion layer, or seed for electroplating of metal thereon, e.g., a semiconductor device, flat-panel, display, or solar panel. A cleaning composition containing base and oxidizing agent components may be employed to clean the copper prior to deposition of cobalt thereon, to achieve substantially reduced defects in the deposited cobalt.

Methods for selectively depositing on metallic surfaces are disclosed. Some embodiments of the disclosure utilize a hydrocarbon having at least two functional groups selected from alkene, alkyne, ketone, hydroxyl, aldehyde, or combinations thereof to form a self-assembled monolayer (SAM) on metallic surfaces.