Interconnect structures and methods and apparatuses for forming the same are disclosed. In an embodiment, a method includes supplying a process gas to a process chamber; igniting the process gas into a plasma in the process chamber; reducing a pressure of the process chamber to less than 0.3 mTorr; and after reducing the pressure of the process chamber, depositing a conductive layer on a substrate in the process chamber.

Interconnect structures and methods and apparatuses for forming the same are disclosed. In an embodiment, a method includes supplying a process gas to a process chamber; igniting the process gas into a plasma in the process chamber; reducing a pressure of the process chamber to less than 0.3 mTorr; and after reducing the pressure of the process chamber, depositing a conductive layer on a substrate in the process chamber.

A method for manufacturing a bit line structure includes the following operations. A bit line conductive layer is formed on a surface of a semiconductor substrate, and the bit line conductive layer is partially located in a groove in the surface of the semiconductor substrate. A first protective layer is formed on surfaces of the bit line conductive layer and the semiconductor substrate. A first barrier layer is formed on a surface of the first protective layer. The surface of the first barrier layer is subjected with passivating treatment. A sacrificial layer is formed on the surface of the first barrier layer, and is provided with a filling part filled in the groove. A part, other than the filling part, of the sacrificial layer is cleaned and stripped.

Ohmic contacts, including materials and processes for forming n-type ohmic contacts on n-type semiconductor substrates at low temperatures, are disclosed. Materials include reactant layers, n-type dopant layers, capping layers, and in some instances, adhesion layers. The capping layers can include metal layers and diffusion barrier layers. Ohmic contacts can be formed on n-type semiconductor substrates at temperatures between 150 and 250° C., and can resist degradation during operation.

Various embodiments of monitoring systems and methods are disclosed herein to monitor particulate accumulation within a bake chamber configured to thermally treat substrates, and determine when the bake chamber requires cleaning. Embodiments of the disclosed monitoring system may generally include one or more sensors to monitor particulate accumulation on one or more inside surfaces of a bake chamber and/or a bake chamber lid assembly, and a controller, which is coupled to receive a sensor output from the one or more sensors and configured to use the sensor output to determine when cleaning is needed. Various types of sensors including, but not limited to, optical sensors, and surface acoustic wave-based sensors may be used in the present disclosure to monitor particulate accumulation inside the bake chamber.

Implementations of the present disclosure provide methods for preventing contact damage or oxidation after via/trench opening formation. In one example, the method includes forming an opening in a structure on the substrate to expose a portion of a surface of an electrically conductive feature, and bombarding a surface of a mask layer of the structure using energy species formed from a plasma to release reactive species from the mask layer, wherein the released reactive species form a barrier layer on the exposed surface of the electrically conductive feature.

Interconnect structures and methods and apparatuses for forming the same are disclosed. In an embodiment, a method includes supplying a process gas to a process chamber; igniting the process gas into a plasma in the process chamber; reducing a pressure of the process chamber to less than 0.3 mTorr; and after reducing the pressure of the process chamber, depositing a conductive layer on a substrate in the process chamber.

A surface-mountable component is disclosed. The surface-mountable component may include a substrate having a side surface and a top surface that is perpendicular to the side surface. The component may include an element layer formed on the top surface of the substrate. The element layer may include a thin-film element and a contact pad electrically connected with the thin-film element. The contact pad may extend to the side surface of the substrate. The component may include a terminal that is electrically connected with the contact pad at a connection area. The connection area may be parallel with the top surface of the substrate. The terminal may have a visible edge surface that is approximately aligned with the side surface of the substrate. The visible edge surface may be visible for inspection when the surface-mountable component is mounted to a mounting surface.

Implementations of the present disclosure provide methods for preventing contact damage or oxidation after via/trench opening formation. In one example, the method includes forming an opening in a structure on the substrate to expose a portion of a surface of an electrically conductive feature, and bombarding a surface of a mask layer of the structure using energy species formed from a plasma to release reactive species from the mask layer, wherein the released reactive species form a barrier layer on the exposed surface of the electrically conductive feature.

A method of forming a structure comprises forming a pattern of elongate features extending vertically from a base structure. Conductive material is formed on the elongate features. After completing the forming of the pattern of elongate features, the elongate features, the conductive material, or both is (are) exposed to at least one surface treatment gas. The at least one surface treatment gas comprises at least one species formulated to diminish attractive or cohesive forces at a surface of the conductive material. Apparatus and additional methods are also described.