The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

To provide a semiconductor film capable of realizing further enhancement of photoelectric conversion efficiency. The semiconductor film includes semiconductor nanoparticles and a compound represented by the following general formula (1), in which the compound represented by the general formula (1) is coordinated to the semiconductor nanoparticles. ##STR00001##
(In the general formula (1), X represents —SH, —COOH, —NH.sub.2, —PO(OH).sub.2, or —SO.sub.2(OH), A.sup.1 represents —S, —COO, —PO(OH)O, or —SO.sub.2(O), and n is an integer of 1 to 3. B.sup.1 represents Li, Na, or K.)

There is provided an imaging element includes a photoelectric conversion unit that includes a first electrode, a photoelectric conversion layer, and a second electrode, in which the photoelectric conversion unit further includes a charge storage electrode that has an opposite region opposite to the first electrode via an insulating layer, and a transfer control electrode that is opposite to the first electrode and the charge storage electrode via the insulating layer, and the photoelectric conversion layer is disposed above at least the charge storage electrode via the insulating layer.

A simultaneous dual-band image sensor having a plurality of pixels includes a substrate, a common ground on the substrate, wherein each pixel includes a Band 1 absorber layer on the common ground layer, a barrier layer on the Band 1 absorber layer, a Band 2 absorber layer on the barrier layer, a ring opening in the pixel formed by a removed portion of the Band 2 absorber layer, a removed portion of the barrier layer and a removed portion of the Band 1 absorber layer, wherein the ring opening does not extend through the Band 1 absorber layer, a first contact on a portion of the Band 2 absorber layer inside the ring, and a second contact on a portion of the Band 2 absorber layer outside the ring. The Band 1 absorber layer and the Band 2 absorber layer are n-type, or the Band 1 absorber layer and the Band 2 absorber layer are p-type.

An image sensor includes a plurality of thin lens elements, each of the plurality of thin lens elements including a plurality of scatterers configured to concentrate light of a partial wavelength band among light incident on the image sensor. The image sensor further includes a micro lens array configured to concentrate light of another wavelength band wider than the partial wavelength band, and a sensing element configured to sense light passing through the plurality of thin lens elements and the micro lens array.

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity.

The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

In one embodiment, a pixel for an image sensor includes a first subpixel and a second subpixel. Each of the first and second subpixels include a polygon shape. Each of the first and second subpixels include an emissive layer, a transparent cathode layer, and a transparent anode layer.

An image pickup element includes a photoelectric conversion section including a first electrode, a photoelectric conversion layer including an organic material, and a second electrode stacked on one another. Between the first electrode and the photoelectric conversion layer, an oxide semiconductor layer and an oxide film are formed from the first electrode side.

A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Trl in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Trl embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Trl.