Light detecting structures comprising germanium (Ge) photodiodes formed in a device layer of a germanium on-insulator (GeOI) wafer, focal planes arrays based on such Ge photodiodes (PDs) and methods for fabricating such Ge photodiodes and focal plane arrays (FPAs). An FPA includes a Ge-on-GeOI PD array bonded to a ROIC where the handle layer of the GeOI layer is removed. The GeOI insulator properties and thickness can be designed to improve light coupling into the PDs.

A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including growing a germanium-silicon layer on a semiconductor donor wafer; defining pixels of the image sensor array on the germanium-silicon layer; defining a first interconnect layer on the germanium-silicon layer, wherein the interconnect layer includes a plurality of interconnects coupled to the first group of photodiodes and the second group of photodiodes; defining integrated circuitry for controlling the pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer, wherein the second interconnect layer includes a plurality of interconnects coupled to the integrated circuitry; and bonding the first interconnect layer with the second interconnect layer.

A heterogeneously substrate-bonded optical assembly includes a processor chip, an optical chip and a molding compound layer. The processor chip includes: a processor circuit; reader circuits electrically connected to the processor circuit; a first protection layer disposed on the processor circuit and the reader circuits; and first vias penetrating through first protection layer and being electrically connected to the reader circuit. The optical chip includes: a second protection layer bonded to the first protection layer; second vias penetrating through the second protection layer and being bonded to the first vias; and optical pixels electrically connected to the reader circuit respectively through the second vias and the first vias. The molding compound layer surrounds the optical chip and is disposed on the first protection layer. A method of manufacturing the optical assembly applicable to high-resolution applications is also disclosed.

A monolithic multi-metallic thermal expansion stabilizer (MTES) has a coefficient of thermal expansion (CTE) differential between a first surface and a second surface, and a transition region extending between for mitigating the CTE differential.

An imaging sensor package includes: an imaging sensor; and an architected substrate coupled to a bottom surface of the imaging sensor. The architected substrate has local stiffness variations along an in-plane direction of the architected substrate, and the imaging sensor and the architected substrate are curved.

Disclosed are methods of fabricating short-wave infrared detector arrays including readout and absorption wafers connected by a recrystallized a-Si layer. The absorber wafer includes a SWIR conversion layer with a Ge.sub.1-xSn.sub.x alloy composition. Process steps realize the readout wafer and a portion of the absorption wafer, including bonding the readout wafer and a first portion of the absorption wafer. The a-Si intermediate layer linking the readout wafer and the first portion of the absorption wafer the a-Si intermediate layer is recrystallized by applying heat by a light source. The method assures a temperature profile between the light entrance surface and the CMOS electronic layer of the readout wafer maintaining readout layer temperature <350° C. during recrystallization. After the recrystallization process step the absorption wafer is completed by depositing the SWIR conversion layer. Also disclosed is a SWIR detector array realized by the method and SWIR detector array applications.

An optical detector that is sensitive in at least two infrared wavelength ranges: first spectral band and second spectral band; and having a set of pixels, comprising: an absorbent structure disposed on a lower face of a substrate and comprising a stack of at least one absorbent layer made of semi-conductor material; the detector further comprising a plurality of dielectric resonators on the upper surface of said substrate forming an upper surface metasurface, the metasurface configured to diffuse, deflect and focus in the pixels of the detector in a resonant manner, when illuminated by the incident light, a first beam having at least one first wavelength included in the first spectral band and a second beam having at least one second wavelength included in the second band, the metasurface also being configured so that said first and second beams are focused on different pixels of the detector.

A hybrid multispectral imaging sensor, characterized in that it comprises a photosensitive backside-illumination detector (DET) that is made on a substrate (100) made of InP, and that is formed of a matrix of pixels (105, P1, P2, P3) that are themselves made in a structure based on InGaAs (103), and a filter module (MF) that is formed of a matrix of elementary filters (λ1, λ2, λ3) reproducing said matrix of pixels, and that is mounted into contact with said substrate (100), said substrate (100) made of InP having a thickness less than 50 μm, and preferably less than 30 μm.

A device of acquisition of a 2D image and of a depth image, including: a first sensor including a front surface and a rear surface, the first sensor being formed inside and on top of a first semiconductor substrate and including a plurality of 2D image pixels and a plurality of transmissive windows; and a second sensor including a front surface placed against the rear surface of the first sensor and a rear surface opposite to the first sensor, the second sensor being formed inside and on top of a second semiconductor substrate and comprising a plurality of depth pixels arranged opposite the windows of the first sensor.

An imaging device according to an embodiment of the present disclosure including a first chip; a support substrate; and a second chip. The support substrate includes an excavated portion in a region opposed to the first chip. The excavated portion has a shape of a recess or a shape of a hole. The second chip is disposed in the excavated portion of the support substrate. The second chip is electrically coupled to the first chip. At least one of the first chip or the second chip has a photoelectric conversion function.