Techniques are disclosed for facilitating dual color detection. In one example, an imaging device includes a first pixel configured to detect first image data associated with a first waveband of electromagnetic radiation. The imaging device further includes a second pixel configured to detect second image data associated with a second waveband of the electromagnetic radiation, where at least a portion of the second waveband does not overlap the first waveband. The imaging device further includes a bias circuit configured to apply a first voltage between the first pixel and a first ground contact, and apply a second voltage between the second pixel and a second ground contact. The first voltage is different from the second voltage. Related methods are also provided.

A device and method of manufacturing are disclosed. The device contains a buffer layer containing a first material, a detector structure disposed above the buffer layer, a readout integrated circuit coupled with the detector structure, a layer above the readout integrated circuit comprising a second material, and a silicon layer above the layer.

An image sensing device includes a pixel array including hybrid pixel groups that are arranged in rows and columns, each of the hybrid pixel groups including a plurality of color detection pixels and a plurality of distance detection pixels. Each hybrid pixel group further includes first photoelectric conversion elements disposed in the color detection pixels and configured to perform photoelectric conversion of light incident upon the color detection pixels, second photoelectric conversion elements disposed in the distance detection pixels and configured to perform photoelectric conversion of light incident upon the distance detection pixels, first device isolation structures disposed between the first photoelectric conversion elements, second device isolation structures disposed between the second photoelectric conversion elements, first microlenses disposed over the first photoelectric conversion elements, and configured to allow incident light to be focused at the first photoelectric conversion elements, and a second microlens disposed over the second photoelectric conversion elements, and configured to allow incident light to be focused at the second device isolation structures.

An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors and alignment marks; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the third level is aligned to the alignment marks, where the second level is bonded to the first level, and where the bonded includes an oxide to oxide bond.

In one example, a method comprises: exposing a first photodiode to incident light to generate first charge; exposing a second photodiode to the incident light to generate second charge; converting, by a first charge sensing unit, the first charge to a first voltage; converting, by a second charge sensing unit, the second charge to a second voltage; controlling an ADC to detect, based on the first voltage, that a quantity of the first charge reaches a saturation threshold, and to measure a saturation time when the quantity of the first charge reaches the saturation threshold; stopping the exposure of the first photodiode and the second photodiode to the incident light based on detecting that the quantity of the first charge reaches the saturation threshold; and controlling the ADC to measure, based on the second voltage, a quantity of the second charge generated by the second photodiode before the exposure ends.

An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors and alignment marks; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the third level is aligned to the alignment marks, where the second level is bonded to the first level, and where the bonded includes an oxide to oxide bond.

Systems and methods may be provided for coupling together semiconductor devices. One or more of the semiconductor devices may be provided with an array of bump contacts formed in an etch back process. The bump contacts may be indium bumps. The indium bumps may be formed by depositing a sheet of indium onto a surface of a device substrate, depositing and patterning a layer of photoresist over the indium layer, and selectively etching the indium layer to the surface of the substrate using the patterned photoresist layer to form the indium bumps. The substrate may be an infrared detector substrate. The infrared detector substrate may be coupled to a readout integrated circuit substrate using the bumps.

An image sensor including a first image sensor element underlying a second image sensor element is provided. The first image sensor element is configured to generate electrical signals from an electromagnetic radiation within a first range of wavelengths. The second image sensor element is over the first image sensor and is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The first and second image sensor elements are within a substrate. The first image sensor element comprises a germanium layer between a bottom surface of the substrate and the second image sensor element. The second image sensor element comprises silicon.

A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiO.sub.x, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.

A method of manufacturing a hybrid focal-plane array includes: forming a read-out integrated circuit with integral bending slit; forming a detector die separately from the read-out integrated circuit and including a detector with integral bending slit; and joining the read-out integrated circuit and the detector die to each other such that the read-out bending slit and the detector bending slit are aligned with each other.