A semiconductor device is provided. The semiconductor device includes a substrate and a semiconductor layer formed over the substrate. The semiconductor device further includes a first channel layer and a second channel layer and a first insulating structure interposing the first channel layer and the semiconductor layer and a second insulating structure interposing the first channel layer and the second channel layer. The semiconductor device further includes a gate stack abutting the first channel layer and the second channel layer, and the gate stack includes a first portion vertically sandwiched between the first channel layer and the semiconductor layer and a second portion vertically sandwiched between the first channel layer and the second channel layer.

A semiconductor device with a C-shaped channel portion, a method of manufacturing the semiconductor device, and an electronic apparatus including the semiconductor device are provided. The semiconductor device may include: a channel portion on a substrate, wherein the channel portion includes a curved nanosheet/nanowire with a C-shaped cross section; source/drain portions respectively located at upper and lower ends of the channel portion with respect to the substrate; and a gate stack surrounding a periphery of the channel portion.

A semiconductor device includes a substrate, a first insulating layer on the substrate, source and drain patterns at spaced-apart locations on the first insulating layer, and a channel layer having a transition metal therein, such as a transition metal dichalcogenide. The channel layer extends on the first insulating layer and between the source and drain patterns. A second insulating layer is also provided, which extends on the channel layer and has a thickness less than a thickness of the first insulating layer. A gate structure is provided, which extends on the second insulating layer, and opposite the channel layer. The channel layer may include at least one of MoS.sub.2, WS.sub.2, MoSe.sub.2, WSe.sub.2, MoSe.sub.2, WTe.sub.2, and ZrSe.sub.2.

A semiconductor device including vertical transistors with a back side power structure, and methods of making the same are described. In one example, a described semiconductor structure includes: a gate structure including a gate pad and a gate contact on the gate pad; a first source region disposed below the gate pad; a first drain region disposed on the gate pad, wherein the first source region, the first drain region and the gate structure form a first transistor; a second source region disposed below the gate pad; a second drain region disposed on the gate pad, wherein the second source region, the second drain region and the gate structure form a second transistor; and at least one metal line that is below the first source region and the second source region, and is electrically connected to at least one power supply.

A semiconductor structure is provided. The semiconductor structure includes a substrate, a first superlattice structure and a second superlattice structure over the substrate, a gate stack that surrounds a channel region of each of the first superlattice structures and the second superlattice structure, and source/drain structures on opposite sides of the gate stack contacting sidewalls of the first superlattice structure and the second superlattice structure. The second superlattice structure is disposed over the first superlattice structure. Each of the first superlattice structures and the second superlattice structure includes vertically stacked alternating first nanosheets of a first semiconductor material and second nanosheets of a second semiconductor material that is different from the first semiconductor material.

An electronic device including a two-dimensional material is provided. The electronic device may include a substrate; a metal layer on a partial region of the substrate; a two-dimensional material layer over the metal layer and an upper surface of the substrate; and an insertion layer between the metal layer and the two-dimensional material layer.

Disclosed are a semiconductor device having a U-shaped structure, a method of manufacturing the semiconductor device, and an electronic including the semiconductor device. According to an embodiment, the semiconductor device may include: a first fin and a second fin disposed opposite to each other, wherein the first fin and the second fin extend in a vertical direction with respect to a substrate; a connection nanosheet connecting a bottom end of the first fin to a bottom end of a second fin to form a U-shaped structure, wherein the connection nanosheet is spaced apart from a top surface of the substrate.

A semiconductor device formed by forming a stack of alternating horizontal nanosheet layers, recessing the stack for an n-type field effect transistor (nFET), growing crystalline semiconductor adjacent to the stack, forming vertical nanosheets from the crystalline semiconductor, forming inner spacers between the vertical nanosheets, and forming a high-k metal gate structure around the horizontal nanosheets and the vertical nanosheets.

An electronic device includes: a substrate including a source, a drain, and a channel between the source and the drain; a gate electrode arranged above the substrate and facing the channel, the gate electrode being apart from the channel in a first direction; and a ferroelectric thin film structure between the channel and the gate electrode, the ferroelectric thin film structure including a first ferroelectric layer, a crystallization barrier layer including a dielectric material, and a second ferroelectric layer, which are sequentially arranged from the channel in the first direction. The average of sizes of crystal grains of the first ferroelectric layer may be less than or equal to the average of sizes of crystal grains of the second ferroelectric layer, and owing to small crystal grains, dispersion of performance may be improved.

The solution provides structures and fabrication steps for manufacturing a device that includes a core comprising a dielectric material extending vertically from a substrate and a vertical shell having a cross-section having a rounded portion. The vertical shell can include an epitaxially grown semiconductor material that at least partially surrounds the core and forms a channel of a transistor. The core can include a second vertical shell including a second epitaxially grown semiconductor material that at least partially surrounds the core and forms a second channel of the transistor.