A light-emitting component includes a light-emitting element, a thyristor, and a light-absorbing layer. The thyristor includes a semiconductor layer having a bandgap energy smaller than or equal to a bandgap energy equivalent to a wavelength of light emitted by the light-emitting element. The thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the thyristor such that the light-emitting element and the thyristor are stacked. The light-absorbing layer absorbs the light emitted by the light-emitting element.

A layered structure includes a thyristor and a light-emitting element. The thyristor at least includes four layers. The four layers are an anode layer, a first gate layer, a second gate layer, and a cathode layer arranged in this order. The light-emitting element is disposed such that the light-emitting element and the thyristor are connected in series. The thyristor includes a semiconductor layer having a bandgap energy smaller than bandgap energies of the four layers.

A light-emitting component includes a light-emitting element, a driving thyristor, and a light-absorbing layer. The light-emitting element emits light of a predetermined wavelength. The driving thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the driving thyristor such that the light-emitting element and the driving thyristor are stacked, and absorbs light emitted by the driving thyristor.

A light-emitting component includes a substrate, a light-emitting element, a thyristor, and a light-transmission reduction layer. The light-emitting element is disposed on the substrate. The thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-transmission reduction layer is disposed between the light-emitting element and the thyristor such that the light-emitting element and the thyristor are stacked, and suppresses light emitted by the thyristor from passing therethrough.

According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a gate electrode, and a second electrode. The first semiconductor region is provided on the first electrode. The first semiconductor region includes first portions and first protruding portions. The first portions are arranged along a first direction and a second direction perpendicular to the first direction. The first protruding portions respectively protrude from the first portions. The second semiconductor regions are spaced from each other and provided in the first semiconductor region. The third semiconductor region is provided on the first semiconductor region and the second semiconductor regions.

The present disclosure relates to semiconductor structures and, more particularly, to vertically stacked diode-trigger silicon controlled rectifiers and methods of manufacture. The structure includes: a silicon controlled rectifier in a trap rich region of a semiconductor substrate; and at least one diode built in polysilicon (gate material) and isolated by a gate-dielectric.

A transient-voltage-suppression (TVS) diode device and a method of fabricating the same are disclosed. The TVS diode device includes a substrate. A second conductivity type first epitaxial layer is disposed over the substrate. A second conductivity type second epitaxial layer is disposed between the second conductivity type first epitaxial layer and the substrate. A plurality of trench isolation features divides the substrate into a first active region including a second conductivity type doped well region disposed in the second conductivity type first epitaxial layer. A first conductivity type doped well region and a first conductivity type buried layer are disposed in the second conductivity type second epitaxial layer. The second conductivity type doped well region and the first conductivity type buried layer collectively form a Zener diode.

A protection circuit of a semiconductor device includes a high electron mobility transistor and a protection element. Between the drain and the gate of the high electron mobility transistor, the protection element includes: a thyristor; and a first resistor connected in series to the thyristor. Between the source and the gate of the high electron mobility transistor, the protection element includes: a second resistor and an interrupter that is connected in series to the second resistor. The interrupter interrupts a flow of a current between the drain and the gate when the thyristor is turned off, and the interrupter permits the current to flow between the drain and the gate when the thyristor is turned on.

Provided are an ESD protection diode and an electronic device including the same. An ESD protection diode and an electronic device including the same according to an embodiment of the inventive concept include first to fifth wells. The first well is connected to a first voltage terminal. The second well is connected to a second voltage terminal. The third well is connected to the input/output terminal. The fourth well is disposed between the first well and the third well, and the fifth well is disposed between the second well and the third well. The first to third wells are N-type wells, and the fourth and fifth wells are P-type wells. The first well includes a first N+ diffusion region and the second well includes a second N+ diffusion region. The fourth well includes a first P+ diffusion region and the fifth well includes a second P+ diffusion region. According to an embodiment of the inventive concept, an internal circuit is protected fro an ESD pulse applied to a plurality of terminals and holding voltage is increased.

Provided is an electrostatic protection circuit that has little leakage current under normal operation and allows a trigger voltage to be set comparatively freely, without requiring a special process step. This electrostatic protection circuit is provided with a series circuit including a transistor, a predetermined number of diodes and an impedance element that are connected in series between the first node and the second node, and a discharge circuit configured to send current from the first node to the second node following an increase in a potential difference that occurs between both ends of the impedance element, when the first node reaches a higher potential than the second node and current flows through the series circuit. The predetermined number of diodes are connected between the source and the back gate of the transistor.