Patent classifications
H01L31/1037
High-speed light sensing apparatus
An apparatus including a semiconductor substrate; an absorption layer coupled to the semiconductor substrate, the absorption layer including a photodiode region configured to absorb photons and to generate photo-carriers from the absorbed photons; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; and one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal, where the second control signal is different from the first control signal.
Dielectric sidewall structure for quality improvement in Ge and SiGe devices
Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.
High-speed light sensing apparatus II
An optical apparatus includes: a substrate having a first material; an absorption region having a second material different from the first material, the absorption region configured to absorb photons and to generate photo-carriers including electrons and holes in response to the absorbed photons; a first well region surrounding the absorption region and arranged between the absorption region and the substrate, the first well region being doped with a first polarity; and one or more switches each controlled by a respective control signal, the one or more switches each configured to collect at least a portion of the photo-carriers based on the respective control signal and to provide the portion of the photo-carriers to a respective readout circuit.
Integrated optical sensor with pinned photodiodes
An integrated optical sensor is formed by a pinned photodiode. A semiconductor substrate includes a first semiconductor region having a first type of conductivity located between a second semiconductor region having a second type of conductivity opposite to the first type one and a third semiconductor region having the second type of conductivity. The third semiconductor region is thicker, less doped and located deeper in the substrate than the second semiconductor region. The third semiconductor region includes both silicon and germanium. In one implementation, the germanium within the third semiconductor region has at least one concentration gradient. In another implementation, the germanium concentration within the third semiconductor region is substantially constant.
DIELECTRIC SIDEWALL STRUCTURE FOR QUALITY IMPROVEMENT IN GE AND SIGE DEVICES
Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.
PHOTODETECTORS AND METHODS OF FORMATION
A stacked (or vertically arranged) photodetector having at least one contact region on a germanium sensing region. Including the at least one contact on the germanium sensing region reduces the amount of surface area of the germanium sensing region that is interfaced with a substrate (e.g., a silicon substrate) in which the germanium sensing region is included. This reduces the amount of lattice mismatch reduces the amount of misfit defects for the germanium sensing region, which reduces the dark current for the photodetector. The reduced amount of dark current may increase the photosensitivity of the photodetector, may increase low-light performance of the photodetector, and/or may decrease noise and other defects in images and/or light captured by the photodetector, among other examples.
SYSTEMS AND METHODS FOR HYBRID PIN PbSe MID-WAVELENGTH INFRARED (MWIR) PHOTODETECTORS
Methods and systems are provided for photodetectors employing a hybrid PIN or PN Lead Selenium (PbSe) junction. In some examples, the PbSe junction can include one or more semiconducting layers, including n-type layers, n+-type layers, p(i)-type layers, and/or p+-type layers, as a list of non-limiting examples. Photodetectors employing PbSe PIN or PN junctions are created. Also disclosed are methods for preparing photo-sensitive PbSe semiconducting layers for detection of electromagnetic energy (e.g., mid-wavelength infrared (MWIR)).
PHOTODETECTORS AND PHOTODETECTOR ARRAYS
A dynamic photodiode detector or detector array having a light absorbing region of doped semiconductor material for absorbing photons. Electrons or holes generated by photon absorption are detected with a construction of oppositely heavily doped anode and cathode regions and a heavily doped ground region of the same doping type as the anode region. Photon detection involves switching the device from reverse bias to forward bias to create a depletion region enclosing the anode region. When a photon is then absorbed the electron or hole thereby generated drifts under the electric field induced by the biasing to the depletion region where it causes the anode-to-ground current to increase. Furthermore, the detector is configured such that anode-to-cathode current starts to flow once a threshold number of electrons or holes reaches the depletion region, where the threshold may be one to provide single photon detection.
Capping structures for germanium-containing photovoltaic components and methods of forming the same
At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.
CAPPING STRUCTURES FOR GERMANIUM-CONTAINING PHOTOVOLTAIC COMPONENTS AND METHODS OF FORMING THE SAME
At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.