A multi-wavelength integrated device (5) including plural semiconductor lasers (6) and plural modulators (7) modulating output beams of the plural semiconductor lasers (6) respectively is mounted on the stem (1). Plural leads (10) penetrates through the stem (1) and are connected to the plural semiconductor lasers (6) and the plural modulators (7) respectively. Each lead (10) is a coaxial line in which plural layers are concentrically overlapped with one another. The coaxial line includes a high frequency signal line (12) transmitting a high frequency signal to the modulator (7), a GNU line (14), and a feed line (16) feeding a DC current to the semiconductor laser (6). The high frequency signal line (12) is arranged at a center of the coaxial line. The GND line (14) and the feed line (16) are arranged outside the high frequency signal line (12).

A multilayer circuit board having a central conductor and core layers between a first set of alternating layers and a second set of alternating layers. The central conductor includes a first compound via through the first set of alternating layers, and a second compound via through the second set of alternating layers. A gap extends from a first side of the multilayer circuit board to a second side of the multilayer circuit board. A first array of ground protrusions surrounds the gap and is arranged in a first pattern on the first side of the multilayer circuit board. A second array of ground protrusions surrounds the gap and is arranged in a second pattern on the second side of the multilayer circuit board. A ground path connects the first array of ground protrusions to the second array of ground protrusions.

Embodiments of an embedded mm-wave radio integrated circuit into a substrate of a phased array module are disclosed. In some embodiments, the phased array module includes a first set of substrate layers made of a first material. The mm-wave radio integrated circuit may be embedded in the first set of substrate layers. A second set of substrate layers may be coupled to the first set of substrate layers. The second set of substrate layers may be made of a second material that has a lower electrical loss than the first material. The second set of substrate layers may include a plurality of antenna elements coupled through vias to the mm-wave radio integrated circuit.

A ground isolation transmission line package device includes (1) ground isolation planes between, (2) ground isolation lines surrounding, or (3) such ground planes between and such ground isolation lines surrounding horizontal data signal transmission lines (e.g., metal signal traces) that are horizontally routed through the package device. The (1) ground isolation planes between, and/or (2) ground isolation lines electrically shield the data signals transmitted in signal lines, thus reducing signal crosstalk between and increasing electrical isolation of the data signal transmission lines. In addition, data signal transmission lines may be tuned using eye diagrams to select signal line widths and ground isolation line widths that provide optimal data transmission performance. This package device provides higher frequency and more accurate data signal transfer between different horizontal locations of the data signal transmission lines, and thus also between devices such as integrated circuit (IC) chips attached to the package device.

Apparatuses and methods ate disclosed herein for the formation of to capacitance through substrate via structures. An example apparatus includes an opening formed in a substrate. Wherein the opening has at least one sidewall, a first dielectric at least formed on the sidewall of the opening, a first conductor at least formed on the first dielectric, a second dielectric at least formed on the first conductor, and a second conductor at least formed on a sidewall of the second dielectric.

In one aspect, an active electronically scanned array (AESA) tile includes a radiator structure and oxide-bonded semiconductor wafers attached to the radiator structure and comprising a radio frequency (RF) manifold and a beam former. An RF signal path through the oxide-bonded wafers comprises a first portion that propagates toward the beam former and a second portion that propagates parallel to the beam former.

A method of forming a semiconductor device is provided. The method includes encapsulating with an encapsulant at least a portion of a semiconductor die and a package substrate, the encapsulant including an additive selectively activated by way of a laser. A first opening is formed in the encapsulant, the first opening exposing a predetermined first portion of the package substrate. The additive is activated at the sidewalls of the first opening. A second opening is formed in the encapsulant, the second opening encircling the first opening and exposing a predetermined second portion of the package substrate. The additive is activated at the sidewalls the second opening. A conductive material is plated on the additive activated portions of the encapsulant.

A power amplifier device includes a substrate, a power transistor die, and one or more surface mount components. The substrate has substrate die contacts exposed at a first substrate surface, and additional substrate contacts exposed at a second substrate surface. The power transistor die includes an integrated transistor. The transistor includes a control terminal and a first current conducting terminal coupled, respectively, to first and second die contacts at the first die surface, and a second current conducting terminal coupled to a third die contact at a second die surface. The surface-mount components are connected to the additional substrate components, and the surface-mount components are electrically coupled through the substrate to the first and second die contacts. The power amplifier device also includes an encapsulation material layer covering the surface-mount components and the second substrate surface.

A semiconductor package includes an insulating substrate a pair of signal electrodes, a pair of differential lines, and a ground conductor. The pair of differential lines are respectively connected to the signal electrodes. Each differential line includes a first signal line, a second signal line, a first via-hole conductor, and a second via-hole conductor. The ground conductor includes a ground plane, a ground plane, and a ground via-hole conductor. The ground plane sandwiches the first signal line between the ground plane and the ground plane and forms a stripline structure. The ground via-hole conductor is located along the second via-hole conductor and forms a coaxial structure. In planar perspective view of the first surface, a position on a plane including the ground plane including the second end portion is located in a gap region.

The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.