A semiconductor device includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a first base, a first bonding layer and a first conductive contact. The first bonding layer has a first through via. The first conductive contact is formed within the first through via. The second semiconductor substrate includes a second base, a second bonding layer and a second conductive contact. The second bonding layer has a second through via. The second conductive contact is formed within the second through via. The first conductive contact is electrically connected to the second conductive contact, and the first bonding layer and the second bonding layer are in direct contact with each other.

The present application provides a semiconductor device with an edge-protecting spacer over a bonding pad. The semiconductor device includes a bonding pad disposed over a semiconductor substrate; a first spacer disposed over a top surface of the bonding pad; a dielectric liner disposed between the first spacer and the bonding pad; a dielectric layer between the bonding pad and the semiconductor substrate, wherein the dielectric layer includes silicon-rich oxide; and a conductive bump disposed over the bonding pad and covering the first spacer and the dielectric liner, wherein the conductive bump is electrically connected to a source/drain (S/D) region in the semiconductor substrate through the bonding pad.

A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.

A package structure includes a semiconductor substrate, conductive pads, and conductive vias. The conductive pads are located on and electrically connected to the semiconductor substrate, and each have a testing region and a contact region comprising a core contact region and a buffer contact region, wherein along one direction, the conductive pads each have a maximum length less than a sum of a maximum length of the testing region and a maximum length of the buffer contact region. The conductive vias are respectively located on the core contact regions of the conductive pads.

A semiconductor package includes: (1) a substrate; (2) a first isolation layer disposed on the substrate, the first isolation layer including an opening; (3) a pad disposed on the substrate and exposed from the opening; (4) an interconnection layer disposed on the pad; and (5) a conductive post including a bottom surface, the bottom surface having a first part disposed on the interconnection layer and a plurality of second parts disposed on the first isolation layer.

A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.

Certain embodiments of the present disclosure provide a method for soldering a chip onto a surface. The method generally includes forming a bonding pad on the surface on which the chip is to be soldered, wherein the bonding pad is surrounded, at least in part, by dielectric material. The method may also include treating the dielectric material to render the dielectric material superomniphobic, and soldering the chip onto the bonding pad.

A driving substrate, a micro LED transfer device and a micro LED transfer method are provided. A side surface of the driving substrate is arranged with a binding metal layer, a positioning layer is arranged around the binding metal layer, and a width of the positioning layer at a position away from the driving substrate is less than that a width at a position close to the driving substrate.

A first substrate has a first mesa structure that protrudes from a first bonding-side planar surface. A first metal pad structure is embedded within the first mesa structure. A second substrate has a first recess cavity that is recessed from a second bonding-side planar surface. A second metal pad structure is located at a recessed region of the first recess cavity. The first bonding-side planar surface and the second bonding-side planar surface are brought into physical contact with each other, while the first mesa structure is disposed within a volume of the first recess cavity by self-alignment. A gap is provided between the first metal pad structure and the second metal pad structure within a volume of the first recess cavity. A metal connection pad is formed by selectively growing a third metallic material from the first metal pad structure and the second metal pad structure.

A method of bonding a first substrate to a second substrate, wherein the first substrate includes first electrical contacts on a top surface of the first substrate, and wherein the second substrate includes second electrical contacts on a bottom surface of the second substrate. The method includes forming a block of polyimide on the top surface of the first substrate, wherein the block of polyimide has a rounded upper corner, and vertically moving the top surface of the first substrate and the bottom surface of the second substrate toward each other until the first electrical contacts abut the second electrical contacts, wherein during the moving, the second substrate makes contact with the rounded upper corner of the polyimide causing the first and second substrates to move laterally relative to each other.