H01L2224/0225

Method for Aligning Micro-Electronic Components

Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.

Method for Aligning Micro-Electronic Components

Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.

OPTIMIZED SOLDER PADS FOR MICROELECTRONIC COMPONENTS
20170141072 · 2017-05-18 ·

A multi-chip system includes a top chip stack element comprising a top chip having two major surfaces and top solder pads arrayed along a plane of one of the major surfaces; a bottom chip stack element comprising a bottom substrate having two major surfaces and bottom solder pads arrayed along a plane of one of the major surfaces; one or more solder reservoir pads connected to one or more of the top solder pads or of the bottom solder pads; and solder material; and wherein at least one of the top solder pads is connected to one of the bottom solder pads by one of the solder material.

Semiconductor Die Contact Structure and Method
20170110424 · 2017-04-20 ·

A system and method for forming a semiconductor die contact structure is disclosed. An embodiment comprises a top level metal contact, such as copper, with a thickness large enough to act as a buffer for underlying low-k, extremely low-k, or ultra low-k dielectric layers. A contact pad or post-passivation interconnect may be formed over the top level metal contact, and a copper pillar or solder bump may be formed to be in electrical connection with the top level metal contact.

ELECTRONIC COMPONENT, ELECTRONIC APPARATUS, AND METHOD OF MANUFACTURING ELECTRONIC APPARATUS
20170098631 · 2017-04-06 · ·

An electronic component includes a substrate configured to include a first portion that first thermal conductivity, and have a first surface and a second surface opposite to the first surface;a second portion configured to be formed inside the first portion, and have second thermal conductivity lower than the first thermal conductivity;a first terminal configured to be formed to correspond to the second portion on a side of the first surface; and a second terminal configured to be formed on a side of the second surface.

ELECTRONIC COMPONENT, ELECTRONIC APPARATUS, AND METHOD OF MANUFACTURING ELECTRONIC APPARATUS
20170098631 · 2017-04-06 · ·

An electronic component includes a substrate configured to include a first portion that first thermal conductivity, and have a first surface and a second surface opposite to the first surface;a second portion configured to be formed inside the first portion, and have second thermal conductivity lower than the first thermal conductivity;a first terminal configured to be formed to correspond to the second portion on a side of the first surface; and a second terminal configured to be formed on a side of the second surface.

Method for aligning micro-electronic components

Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.

Method for aligning micro-electronic components

Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.

SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME
20170062363 · 2017-03-02 ·

A semiconductor device includes a semiconductor chip having a semiconductor substrate with chip and boundary regions, and an integrated circuit on the chip region. A center pad is provided on the chip region and on the integrated circuit, and a boundary pad is provided on the boundary region. The semiconductor device further includes a first lower insulating structure having a contact hole exposing the center pad, a second lower insulating structure , at the same vertical level as the first lower insulating structure, and having a first opening exposing the boundary pad to an outside of the first lower insulating structure, a conductive pattern including a contact portion, a conductive line portion, and a bonding pad portion, and an upper insulating structure formed on the first lower insulating structure and the conductive pattern and having a second opening exposing the bonding pad portion to the outside of the semiconductor chip. The first lower insulating structure has a top surface positioned at a higher vertical level than that of the second lower insulating structure.

Semiconductor die with solder restraining wall

A semiconductor die includes a semiconductor surface including circuitry electrically connected to top-level bond pads exposed on a top surface of the semiconductor die, the top-level bond pads including inner bond pads and outer bond pads positioned beyond the inner bond pads. There is solder on at least the inner bond pads. A ring structure is positioned around a location of at least the inner bond pads.