A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a barrier on the passivation layer, at least one of the first or second interconnect structures, or a combination thereof. The first and second interconnect structures comprise first and second via portions through the passivation layer to first and second conductive features of the die substrate, respectively. The first and second interconnect structures further comprise first and second pads, respectively, and first and second transition elements on a surface of the passivation layer between the first and second via portion and the first and second pad, respectively. The barrier is disposed between the first pad and the second pad. The barrier does not fully encircle at least one of the first pad or the second pad.

A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a barrier on the passivation layer, at least one of the first or second interconnect structures, or a combination thereof. The first and second interconnect structures comprise first and second via portions through the passivation layer to first and second conductive features of the die substrate, respectively. The first and second interconnect structures further comprise first and second pads, respectively, and first and second transition elements on a surface of the passivation layer between the first and second via portion and the first and second pad, respectively. The barrier is disposed between the first pad and the second pad. The barrier does not fully encircle at least one of the first pad or the second pad.

Described examples include a packaged device including a first object and a second object spaced from each other by a gap, each object having a first surface and an opposite second surface, the first surfaces of the first object and the second object including first terminals. A structure includes at least two conductors embedded in a dielectric casing consolidating a configuration and organization of the at least two conductors, the at least two conductors having end portions un-embedded by the dielectric casing. An end portion of at least one of the at least two conductors is electrically connected to a first terminal of the first object, and an opposite end portion of the at least one of the at least two conductors is electrically connected to a respective first terminal of the second object, the at least two conductors electrically connecting the first object and the second object.

A method is provided. The method includes one or more of extracting a die from an original packaged integrated circuit, modifying the extracted die, reconditioning the modified extracted die, placing the reconditioned die into a cavity of a hermetic package base, bonding a plurality of bond wires between reconditioned die pads of the reconditioned die to leads of the hermetic package base or downbonds to create an assembled hermetic package base, and sealing a hermetic package lid to the assembled hermetic package base to create a new packaged integrated circuit. Modifying the extracted die includes removing the one or more ball bonds on the one or more die pads. Reconditioning the modified extracted die includes adding a sequence of metallic layers to bare die pads of the modified extracted die. The extracted die is a fully functional semiconductor die with one or more ball bonds on one or more die pads of the extracted die.

A sintering powder comprising copper particles, wherein: the particles are at least partially coated with a capping agent, and the particles exhibit a D10 of greater than or equal to 100 nm and a D90 of less than or equal to 2000 nm.

A sintering powder comprising copper particles, wherein: the particles are at least partially coated with a capping agent, and the particles exhibit a D10 of greater than or equal to 100 nm and a D90 of less than or equal to 2000 nm.

A remapped extracted die is provided. The remapped extracted die includes an extracted die removed from a previous integrated circuit package. The extracted die includes a plurality of original bond pads having locations that do not correspond to desired pin assignments of a new package base and an interposer, bonded to the extracted die. The interposer includes first bond pads configured to receive new bond wires from the plurality of original bond pads, and second bond pads corresponding to desired pin assignments of the new package base, each individually electrically coupled to one of the first bond pads and configured to receive new bond wires from package leads or downbonds of the new package base.

Embodiments may relate to an embedded package having a diffusion barrier layer may be placed between a copper (Cu) pad and a solder ball inside the embedded package. During the solder reflow process, an intermetallic compound (IMC) layer is created that does not come into contact with the Cu, so that subsequent high temperatures applied to the embedded package may not cause the Cu to be consumed through diffusion. Other embodiments may be described and/or claimed.

Embodiments may relate to an embedded package having a diffusion barrier layer may be placed between a copper (Cu) pad and a solder ball inside the embedded package. During the solder reflow process, an intermetallic compound (IMC) layer is created that does not come into contact with the Cu, so that subsequent high temperatures applied to the embedded package may not cause the Cu to be consumed through diffusion. Other embodiments may be described and/or claimed.

An acoustic wave resonator includes: a substrate; a resonating portion formed on a first surface of the substrate; a metal pad connected to the resonating portion through a via hole formed in the substrate; and a protective layer disposed on a second surface of the substrate and including a plurality of layers, wherein the plurality of layers includes an internal protective layer directly in contact with the second surface of the substrate and formed of an insulating material including an adhesion that is stronger than an adhesion of other layers, among the plurality of layers.