In described examples of an integrated circuit (IC) there is a substrate of semiconductor material having a first region with a first transistor formed therein and a second region with a second transistor formed therein. An isolation trench extends through the substrate and separates the first region of the substrate from the second region of the substrate. An interconnect region having layers of dielectric is disposed on a top surface of the substrate. A dielectric polymer is disposed in the isolation trench and in a layer over the backside surface of the substrate. An edge of the polymer layer is separated from the perimeter edge of the substrate by a space.

A method and structure for joining a semiconductor device and a laminate substrate or two laminate substrates where the joint is formed with lead free solders and lead free compositions. The various lead free solders and lead free compositions are chosen so that there is a sufficient difference in liquidus temperatures such that some components may be joined to, or removed from, the laminate substrate without disturbing other components on the laminate substrate.

A semiconductor package includes a die and a patterned conductive layer electrically connected to the die. The patterned conductive layer includes a connection pad and a trace. The semiconductor package further includes an encapsulation layer encapsulating the die and the patterned conductive layer. The semiconductor package further includes an electrical connection element disposed on the connection pad and a protection layer including a sidewall portion surrounding the electrical connection element.

A method and structure for joining a semiconductor device and a laminate substrate or two laminate substrates where the joint is formed with lead free solders and lead free compositions. The various lead free solders and lead free compositions are chosen so that there is a sufficient difference in liquidus temperatures such that some components may be joined to, or removed from, the laminate substrate without disturbing other components on the laminate substrate.

A semiconductor device includes a substrate and a conductive pad coupled to the substrate. A first solder mask is coupled to the substrate and to a portion of the conductive pad so the first solder mask covers the portion of the conductive pad and extends above the conductive pad. A second solder mask is coupled to a portion of the first solder mask and extends above the first solder mask.

A semiconductor device includes a lead frame including a die paddle and a lead, a semiconductor chip, and a clip. The semiconductor chip has a first side and a second side opposite to the first side. The first side is attached to the die paddle and the second side includes a first bond pad and a second bond pad. The clip electrically couples the first bond pad to the lead. The clip contacts the first bond pad at a first edge portion of the first bond pad adjacent to the second bond pad and defines a first cavity between a central portion of the first bond pad and the clip. Solder is within the first cavity to electrically couple the clip to the first bond pad. The semiconductor device includes a first opening to the first cavity to route flux away from the second bond pad during reflow soldering.

A thin film element that includes a base material, a wiring conductor film disposed on the surface of the base material, a protective film that covers the surface of at least the wiring conductor film, an outer electrode, and a first resist film and a second resist film that cover the surface of the protective film. The protective film has a contact hole at a location overlapping the wiring conductor film. The outer electrode is disposed in the contact hole and on the surface of the wiring conductor film. The outer electrode is thicker than the protective film and has a side surface. The first resist film is in contact with the entire circumference of the side surface of the outer electrode, and the second resist film is disposed at a distance from the side surface of the outer electrode and the first resist film.

A semiconductor device manufacturing method includes: preparing a semiconductor substrate including an electrode; forming a wire connected to the electrode; forming a first insulating film including a first opening that partially exposes the wire; forming a base portion that is connected to a portion of the wire exposed via the first opening, and that comprises a conductor including a recess corresponding to the first opening; forming a solder film on a surface of the base portion; and fusing solder included in the solder film by a first heat treatment, and filling the recess with the fused solder.

A semiconductor device manufacturing method includes: preparing a semiconductor substrate including an electrode; forming a wire connected to the electrode; forming a first insulating film including a first opening that partially exposes the wire; forming a base portion that is connected to a portion of the wire exposed via the first opening, and that comprises a conductor including a recess corresponding to the first opening; forming a solder film on a surface of the base portion; and fusing solder included in the solder film by a first heat treatment, and filling the recess with the fused solder.

A semiconductor package includes a die and a patterned conductive layer electrically connected to the die. The patterned conductive layer includes a connection pad and a trace. The semiconductor package further includes an encapsulation layer encapsulating the die and the patterned conductive layer. The semiconductor package further includes an electrical connection element disposed on the connection pad and a protection layer including a sidewall portion surrounding the electrical connection element.