A semiconductor device includes a lead frame including a die paddle and a lead, a semiconductor chip, and a clip. The semiconductor chip has a first side and a second side opposite to the first side. The first side is attached to the die paddle and the second side includes a first bond pad and a second bond pad. The clip electrically couples the first bond pad to the lead. The clip contacts the first bond pad at a first edge portion of the first bond pad adjacent to the second bond pad and defines a first cavity between a central portion of the first bond pad and the clip. Solder is within the first cavity to electrically couple the clip to the first bond pad. The semiconductor device includes a first opening to the first cavity to route flux away from the second bond pad during reflow soldering.

The present invention discloses small-size battery protection packages and provides a process of fabricating small-size battery protection packages. A battery protection package includes a first common-drain metal oxide semiconductor field effect transistor (MOSFET), a second common-drain MOSFET, a power control integrated circuit (IC), a plurality of solder balls, a plurality of conductive bumps, and a packaging layer. The power control IC is vertically stacked on top of the first and second common-drain MOSFETs. At least a majority portion of the power control IC and at least majority portions of the plurality of solder balls are embedded into the packaging layer. The process of fabricating battery protection packages includes steps of fabricating power control ICs; fabricating common-drain MOSFET wafer; integrating the power control ICs with the common-drain MOSFET wafer and connecting pinouts; forming a packaging layer; applying grinding processes; forming a metal layer; and singulating battery protection packages.

In a method of manufacturing an element chip for manufacturing a plurality of element chips by dividing a substrate, where the protruding portions, which are exposed element electrodes, are formed on element regions, protection films made of fluorocarbon film are formed on a second surface and side surfaces of the element chip, and a first surface in a gap by exposing the element chip to second plasma after the substrate is divided by etching. Next, the protection films formed on the second surface and the side surfaces of the element chip are removed while leaving at least a part of the protection film formed in the gap by exposing the element chip to third plasma. Therefore, creep-up of a conductive material in a mounting step is suppressed by the left protection film.

In some examples, a semiconductor device comprises a substrate, a trench, and a layer of a dielectric material. The substrate includes a semiconductor material and has opposing first and second surfaces. The trench extends between the first surface and the second surface, the trench having the dielectric material. The layer of the dielectric material is on the second surface of the substrate and is contiguous with the dielectric material in the trench.

The present invention discloses small-size battery protection packages and provides a process of fabricating small-size battery protection packages. A battery protection package includes a first common-drain metal oxide semiconductor field effect transistor (MOSFET), a second common-drain MOSFET, a power control integrated circuit (IC), a plurality of solder balls, a plurality of conductive bumps, and a packaging layer. The power control IC is vertically stacked on top of the first and second common-drain MOSFETs. At least a majority portion of the power control IC and at least majority portions of the plurality of solder balls are embedded into the packaging layer. The process of fabricating battery protection packages includes steps of fabricating power control ICs; fabricating common-drain MOSFET wafer; integrating the power control ICs with the common-drain MOSFET wafer and connecting pinouts; forming a packaging layer; applying grinding processes; forming a metal layer; and singulating battery protection packages.

The present invention discloses small-size battery protection packages and provides a process of fabricating small-size battery protection packages. A battery protection package includes a first common-drain metal oxide semiconductor field effect transistor (MOSFET), a second common-drain MOSFET, a power control integrated circuit (IC), a plurality of solder balls, a plurality of conductive bumps, and a packaging layer. The power control IC is vertically stacked on top of the first and second common-drain MOSFETs. At least a majority portion of the power control IC and at least majority portions of the plurality of solder balls are embedded into the packaging layer. The process of fabricating battery protection packages includes steps of fabricating power control ICs; fabricating common-drain MOSFET wafer; integrating the power control ICs with the common-drain MOSFET wafer and connecting pinouts; forming a packaging layer; applying grinding processes; forming a metal layer; and singulating battery protection packages.

A semiconductor device comprises a component, a circuit board, a first solder material, and a second solder material. The component comprises many first pads and at least one first auxiliary pad spaced from the first pads on a mating surface of the component, and a distance between the first auxiliary pad at the first preset position and a center of gravity of the component is the longest compared to the first pads. The first auxiliary pad is located on a first preset position of the mating surface. The circuit board comprises many second pads and a second auxiliary pad spaced from the second pads on a mating surface. The first solder material is connected between the first pads and the second pads. The second solder material is connected between the first auxiliary pad and the second auxiliary pad. A method of forming a semiconductor device is also provided.