H01L2224/0555

Transparent light emitting diodes

A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.

Semiconductor device and method of forming shielding layer over integrated passive device using conductive channels

A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.

Semiconductor device and method of forming shielding layer over integrated passive device using conductive channels

A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.

Semiconductor device and process for fabricating the same
10199310 · 2019-02-05 · ·

A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Semiconductor device and process for fabricating the same
10199310 · 2019-02-05 · ·

A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound

A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.

Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound

A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.

Error correction in multiple semiconductor memory units
10019310 · 2018-07-10 · ·

Various embodiments include apparatus and methods to store data in a first semiconductor memory unit and to store error correction information in a second semiconductor memory unit to recover the data. The error correction information has a value equal to at least the value of the data store in the first memory unit.

Error correction in multiple semiconductor memory units
10019310 · 2018-07-10 · ·

Various embodiments include apparatus and methods to store data in a first semiconductor memory unit and to store error correction information in a second semiconductor memory unit to recover the data. The error correction information has a value equal to at least the value of the data store in the first memory unit.

Semiconductor memory device structure

A semiconductor memory device and front-end method of fabricating nickel plated caps over bond pads used in a memory device. The method provides protection of the bond pads from an oxidizing atmosphere without exposing sensitive structures in the memory device to the copper during fabrication. In some examples, the method and device include one or more conductive and insulating layers formed over a substrate, and a plurality of memory cells over the conductive and insulating layers.