Patent classifications
H01L2224/08052
DISPLAY APPARATUS AND METHOD FOR BINDING THE SAME
Embodiments of the present application provide a display apparatus and a method for binding the same. The apparatus includes: a flexible display panel; and a chip on film bound on a binding region of the flexible display panel. The chip on film has at least two rows of output pads and the flexible display panel has at least two rows of input pads. Virtual elongation lines of all of the output pads intersect at a same intersection point in a first datum line perpendicular to the first direction. The output pads are electrically connected to the input pads and the output pads and the input pads have the virtual elongation lines at a same angle with respect to a common datum line, the common datum line being composed of the first datum line and the second datum line coinciding with each other.
Display apparatus and method for binding the same
Embodiments of the present application provide a display apparatus and a method for binding the same. The apparatus includes: a flexible display panel; and a chip on film bound on a binding region of the flexible display panel. The chip on film has at least two rows of output pads and the flexible display panel has at least two rows of input pads. Virtual elongation lines of all of the output pads intersect at a same intersection point in a first datum line perpendicular to the first direction. The output pads are electrically connected to the input pads and the output pads and the input pads have the virtual elongation lines at a same angle with respect to a common datum line, the common datum line being composed of the first datum line and the second datum line coinciding with each other.
SEMICONDUCTOR DEVICE
A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode, the first electrode pad being embedded in the first interlayer insulating film and having one surface located on same plane as one surface of the first interlayer insulating film, and the first dummy electrode being embedded in the first interlayer insulating film, having one surface located on same plane as the one surface of the first interlayer insulating film, and being disposed around the first electrode pad; and a second wiring layer including a second interlayer insulating film, a second electrode pad, and a second dummy electrode, the second electrode pad being embedded in the second interlayer insulating film, having one surface located on same surface as one surface of the second interlayer insulating film, and being bonded to the first electrode pad, and the second dummy electrode having one surface located on same plane as the surface located closer to the first interlayer insulating film of the second interlayer insulating film, being disposed around the second electrode pad, and being bonded to the first dummy electrode. A second semiconductor device includes: a first semiconductor section including a first electrode, the first electrode being formed on a surface located closer to a bonding interface and extending in a first direction; and a second semiconductor section including a second electrode and disposed to be bonded to the first semiconductor section at the bonding interface, the second electrode being bonded to the first electrode and extending in a second direction that intersects with the first direction.
Hybrid bonding with uniform pattern density
A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.