H01L2224/08501

METAL-DIELECTRIC BONDING METHOD AND STRUCTURE
20210210459 · 2021-07-08 ·

A metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface.

METAL-DIELECTRIC BONDING METHOD AND STRUCTURE
20210210459 · 2021-07-08 ·

A metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface.

BONDED ASSEMBLY CONTAINING OXIDATION BARRIERS, HYBRID BONDING, OR AIR GAP, AND METHODS OF FORMING THE SAME

At least one polymer material may be employed to facilitate bonding between the semiconductor dies. Plasma treatment, formation of a blended polymer, or formation of polymer hairs may be employed to enhance bonding. Alternatively, air gaps can be formed by subsequently removing the polymer material to reduce capacitive coupling between adjacent bonding pads.

BONDED ASSEMBLY CONTAINING OXIDATION BARRIERS AND/OR ADHESION ENHANCERS AND METHODS OF FORMING THE SAME
20210028149 · 2021-01-28 ·

A method of forming a bonded assembly includes providing a first semiconductor die containing a first substrate, first semiconductor devices, and first bonding pads that are electrically connected to a respective node of the first semiconductor devices, forming a first oxidation barrier layer on physically exposed surfaces of the first bonding pads, providing a second semiconductor die containing a second substrate, second semiconductor devices, and second bonding pads that are electrically connected to a respective node of the second semiconductor devices, and bonding the second bonding pads to the first bonding pads with at least the first oxidation barrier layer located between the respective first and second bonding pads.

BONDED ASSEMBLY CONTAINING OXIDATION BARRIERS AND/OR ADHESION ENHANCERS AND METHODS OF FORMING THE SAME
20210028149 · 2021-01-28 ·

A method of forming a bonded assembly includes providing a first semiconductor die containing a first substrate, first semiconductor devices, and first bonding pads that are electrically connected to a respective node of the first semiconductor devices, forming a first oxidation barrier layer on physically exposed surfaces of the first bonding pads, providing a second semiconductor die containing a second substrate, second semiconductor devices, and second bonding pads that are electrically connected to a respective node of the second semiconductor devices, and bonding the second bonding pads to the first bonding pads with at least the first oxidation barrier layer located between the respective first and second bonding pads.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20240006359 · 2024-01-04 · ·

In a semiconductor device according to an embodiment, a first connection wiring layer and a second connection wiring layer are bonded such that a first surface and a second surface face each other and a first electrode and a second electrode are in contact with each other, wherein the first electrode includes a first barrier metal film provided in a first trench and containing Ti, and a first conductive film provided in the first trench via the first barrier metal film and containing polycrystalline Cu, the second electrode includes a second barrier metal film provided in a second trench and containing Ti, and a second conductive film provided in the second trench via the second barrier metal film and containing polycrystalline Cu, and Ti and O are present on a bonding surface between the first electrode and the second electrode.

LOW TEMPERATURE BONDED STRUCTURES

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SEMICONDUCTOR DEVICE
20200343208 · 2020-10-29 ·

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

Three-dimensional integrated circuit and method of manufacturing the same

Provided are a three-dimensional integrated circuit (3DIC) and a method of manufacturing the same. The 3DIC includes a first wafer, a second wafer, and a hybrid bonding structure. The second wafer is bonded to the first wafer by the hybrid bonding structure. The hybrid bonding structure includes a blocking layer between a hybrid bonding dielectric layer and a hybrid bonding metal layer.

Semiconductor device and fabrication method of the semiconductor device
10790247 · 2020-09-29 · ·

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.