A method for circuit fabrication includes inspecting an array of solder bumps on a circuit substrate so as to identify a solder bump having a height above the substrate that is greater than a predefined maximum. A first laser beam is directed toward the identified solder bump so as to ablate a selected amount of a solder material from the identified solder bump. Alternatively or additionally, a further solder bump having a height above the substrate that is less than a predefined minimum is identified, and one or more molten droplets of the solder material are deposited on the further solder bump. After ablating or depositing the solder material, a second laser beam is directed toward the identified solder bump with sufficient energy to cause the solder material in the identified solder bump to melt and reflow.

Provided are a light emitting device and a method of fabricating the same. The light emitting device includes: a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer and including a first surface and a second surface; first and second contact electrodes each ohmic-contacting the first and second conductivity type semiconductor layers; and first and second electrodes disposed on the first surface of the light emitting structure, in which the first and second electrodes each include sintered metal particles and the first and second electrodes each include inclined sides of which the tangential gradients with respect to sides of vertical cross sections thereof are changing.

A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.

A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.

A method for forming the conductive layer includes: providing a first conductive film and a solution with a conductive material; coating a surface of the first conductive film with the solution, before performing the coating, a temperature of the first conductive film being lower than an evaporation temperature or a sublimation temperature of the solution; and in a process step of performing the coating or after performing the coating, heating the first conductive film, such that the temperature of the first conductive film is higher than or equal to the evaporation temperature or the sublimation temperature of the solution, and forming a second conductive film covering the surface of the first conductive film, wherein the second conductive film including the conductive material.

A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.

A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.

Provided is a solder material which enables a growth of an oxide film to be inhibited. A solder ball which is a solder material is composed of a solder layer and a covering layer covering the solder layer. The solder layer is spherical and is composed of a metal material containing an alloy including Sn content of 40% and more. Otherwise the solder layer is composed of a metal material including Sn content of 100%. In the covering layer, a SnO film is formed outside the solder layer, and a SnO.sub.2 film is formed outside the SnO film. A thickness of the covering layer is preferably more than 0 nm and equal to or less than 4.5 nm. Additionally, a yellow chromaticity of the solder ball is preferably equal to or less than 5.7.

A die bonding process for assembling a semiconductor device includes the steps of applying a sintered-silver-use paste to each of a plurality of first regions on an upper surface of a chip mounting part, drying the sintered-silver-use paste and applying a silver paste to a second region located between/among the respective first regions. Further, the process includes the step of mounting a semiconductor chip onto the chip mounting part in such a manner that a rear surface of the semiconductor chip faces an upper surface of the chip mounting part with the sintered-silver-use paste and the silver paste being interposed. After mounting the chip, part of each of first, second, third and fourth corners of a principal surface of the semiconductor chip is located in each of the first regions.

A die bonding process for assembling a semiconductor device includes the steps of applying a sintered-silver-use paste to each of a plurality of first regions on an upper surface of a chip mounting part, drying the sintered-silver-use paste and applying a silver paste to a second region located between/among the respective first regions. Further, the process includes the step of mounting a semiconductor chip onto the chip mounting part in such a manner that a rear surface of the semiconductor chip faces an upper surface of the chip mounting part with the sintered-silver-use paste and the silver paste being interposed. After mounting the chip, part of each of first, second, third and fourth corners of a principal surface of the semiconductor chip is located in each of the first regions.