Patent classifications
H01L2224/16052
Pad structure design in fan-out package
A package includes a corner, a device die, a plurality of redistribution lines underlying the device die, and a plurality of non-solder electrical connectors underlying and electrically coupled to the plurality of redistribution lines. The plurality of non-solder electrical connectors includes a corner electrical connector. The corner electrical connector is elongated. An electrical connector is farther away from the corner than the corner electrical connector, wherein the electrical connector is non-elongated.
Flip-chip semiconductor-on-insulator transistor layout
A flip-chip semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die at least first and second contact pads and a transistor including a first terminal formed within the active layer. A first portion of the first terminal falls within a footprint of the first contact pad and a second portion of the first terminal falls within a footprint of the second contact pad.
PACKAGE STRUCTURE WITH PROTECTIVE LID
A package structure is provided. The package structure includes a chip structure and a first adhesive element partially covering the chip structure. The first adhesive element has a first portion and a second portion, and the first portion is spaced apart from the second portion. The first adhesive element has a first thermal conductivity. The package structure also includes a second adhesive element partially covering the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is higher than the first thermal conductivity.