A display device includes a substrate including an active area having pixels and a non-active area including a pad region. A pad electrode is disposed in the pad region and includes a first pad electrode and a second pad electrode disposed on the first pad electrode. A first insulating pattern is interposed between the first and second pad electrodes. In a plan view, the first insulating pattern is positioned inside the first pad electrode, and a portion of the second pad electrode overlapping the first insulating pattern protrudes further from the substrate in a thickness direction than a portion of the second pad electrode not overlapping the first insulating pattern. The second pad electrode directly contacts a portion of the upper surface of the first pad electrode. In a plan view, an area of the second pad electrode is greater than an area of the first pad electrode.

A package structure is provided. The package structure includes an interposer substrate including an insulating structure, a conductive pad, a first conductive line, and a first conductive via structure. The package structure includes an electronic device bonded to the conductive pad. The package structure includes a chip structure bonded to the first end portion of the first conductive via structure. The package structure includes a first conductive bump connected between the chip structure and the first end portion of the first conductive via structure. The first end portion protrudes into the first conductive bump and is in direct contact with the first conductive bump.

A package structure is provided. The package structure includes an interposer substrate including an insulating structure, a conductive pad, a first conductive line, and a first conductive via structure. The package structure includes an electronic device bonded to the conductive pad. The package structure includes a chip structure bonded to the first end portion of the first conductive via structure. The package structure includes a first conductive bump connected between the chip structure and the first end portion of the first conductive via structure. The first end portion protrudes into the first conductive bump and is in direct contact with the first conductive bump.

A semiconductor chip stack includes a first semiconductor chip, a second semiconductor chip, and a connection via which the first electrode and the second electrode are electrically connected to each other. The connection includes a first column and a second column. The first column is constituted by a material having a higher degree of activity with respect to heat than a material that constitutes the second column and is smaller in volume than the second column. Further, the connection has an aspect ratio of 0.5 or higher in a height direction.

A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.

A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.

A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.

A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

A connecting method of a circuit member, includes: a first process of preparing a connection material that a solder material disperses in the adhesive; a second process of disposing the first circuit member and the second circuit member to cause the first electrode of the first circuit member and the second electrode of the second circuit member to oppose each other via the connection material; and a third process of compressing the first circuit member and the second circuit member while applying heat to the connection material. The third process includes a first pressing process which is performed before a temperature of the connection material reaches a melting point of the solder material, and a second pressing process which follows the first pressing process.