A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

A semiconductor package and a manufacturing method of a semiconductor package are provided. The semiconductor package includes a device die, a redistribution structure, a heat dissipation module and a molding compound. The redistribution structure is disposed at a front side of the device die. The heat dissipation module includes a thermal interfacial layer and a metal lid. The thermal interfacial layer is in direct contact with a back side of the device die, and located between the device die and the metal lid. The molding compound is disposed between the redistribution structure and the heat dissipation module, and has a body portion and an extended portion. The device die is located in the extended portion. The body portion laterally surrounds the extended portion. The extended portion is thicker than the body portion.

A semiconductor package includes a mold substrate, at least one first semiconductor chip in the mold substrate and including chip pads, wiring bonding pads formed at a first surface of the mold substrate and connected to the chip pads by bonding wires, and a redistribution wiring layer covering the first surface of the mold substrate and including redistribution wirings connected to the wiring bonding wirings.

A package structure including at least one semiconductor die, an insulating encapsulant, an insulating layer, conductive pillars, a dummy pillar, a first seed layer and a redistribution layer is provided. The semiconductor die has a first surface and a second surface opposite to the first surface. The insulating encapsulant is encapsulating the semiconductor die. The insulating layer is disposed on the first surface of the semiconductor die and on the insulating encapsulant. The conductive pillars are located on the semiconductor die. The dummy pillar is located on the insulating encapsulant. The first seed layer is embedded in the insulating layer, wherein the first seed layer is located in between the conductive pillars and the semiconductor die, and located in between the dummy pillar and the insulating encapsulant. The redistribution layer is disposed over the insulating layer and is electrically connected to the semiconductor die through the conductive pillars.

A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Provided are a package structure and a method of manufacturing the same. The method includes the following processes. A die is provided. An encapsulant is formed laterally aside the die. A first dielectric layer is formed on the encapsulant and the die. A first redistribution layer is formed to penetrate through the first dielectric layer to connect to the die, the first redistribution layer includes a first via embedded in the first dielectric layer and a first trace on the first dielectric layer and connected to the first via. The first via and the first trace of the first redistribution layer are formed separately.

A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.

A semiconductor package manufacturing method thereof are provided. The semiconductor package includes a high-power device die, a redistribution structure, a heat dissipation module and a molding compound. The high-power device die has a front side and a back side opposite to the front side. The redistribution structure is disposed at the front side. The heat dissipation module is in direct contact with the back side. The molding compound is disposed between the redistribution structure and the heat dissipation module, and surrounding the high-power device die. The molding compound has a body portion and an extended portion. An interface between the body portion and the heat dissipation module is substantially parallel to the back side of the high-power device die. A thickness of the extended portion is greater than a thickness of the body portion.

The invention relates to a method (20) for producing an electric circuit (2) in which a circuit carrier (4) comprising a first contact surface (14) and a second contact surface (16) is provided. An insulating body (26) is placed on the circuit carrier (4), wherein the insulating body (26) at least partially covers the first contact surface (14) and the second contact surface (16), and the insulating body (26) comprises a recess (34) in the region of both contact surfaces (14, 16). A flowable electro-conductive medium (44) is introduced into the insulating body (26). The invention also relates to an electric circuit (2) and to a further method (60) for producing an electric circuit (2).

A semiconductor package is provided. The semiconductor package can include a first redistributed layer on which a plurality of semiconductor chips and a plurality of passive devices are mounted on one surface, a second redistributed layer electrically connected to the first redistributed layer through a via, an external connection terminal formed on the lower surface of the second redistributed layer, a first mold provided to cover the plurality of semiconductor chips and the plurality of passive devices on the first redistributed layer, and a second mold provided between the first redistributed layer and the second redistributed layer. Each of the first redistributed layer and the second redistributed layer includes a wiring pattern and an insulating layer and is composed of a plurality of layers, and at least one of the plurality of semiconductor chips is disposed between the first redistributed layer and the second redistributed layer.