A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, a second encapsulant and a first RDL structure. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die. The first RDL structure is disposed on the bridge die and the second encapsulant.

A manufacturing method of a semiconductor apparatus includes preparing an intermediate member that includes a first member having a first substrate comprising a semiconductor element formed thereon, a second member having a second substrate, the second substrate including a part of a circuit electrically connected to the semiconductor element and having a linear expansion coefficient different from that of the first substrate, and a third member having a third substrate showing such a linear expansion coefficient that a difference between itself and the linear expansion coefficient of the first substrate is smaller than a difference between the linear expansion coefficients of the first substrate and the second substrate, and includes bonding the first member and the second member together. A first bonding electrode containing copper electrically connected to the semiconductor element and a second bonding electrode containing copper electrically connected to the circuit are bonded together.

In an embodiment, a method includes forming a conductive feature adjacent to a substrate; treating the conductive feature with a protective material, the protective material comprising an inorganic core with an organic coating around the inorganic core, the treating the conductive feature comprising forming a protective layer over the conductive feature; and forming an encapsulant around the conductive feature and the protective layer. In another embodiment, the method further includes, before forming the encapsulant, rinsing the protective layer with water. In another embodiment, the protective layer is selectively formed over the conductive feature.

An image sensor packaging method, an image sensor packaging structure and a lens module are disclosed by the present invention provides. With the image sensor packaging method, a plurality of image sensor chips are embedded in a molding layer, thus allowing a greatly reduced thickness and improved slimness of the resulting packaging structure. Moreover, in this packaging method, instead of bonding wires, solder pads are externally connected by thin film metal layer formed on non-photosensitive surface area located on the same side as light-sensing surfaces. This allows a reduced impact on the light-sensing surfaces as well as a shorter distance from each solder pad to a corresponding one of the light-sensing surfaces along the direction parallel to the light-sensing surfaces, when compared to the use of bonding wires. As a result, the size of the image sensor chips is allowed to be further reduced, and using a packaging structure resulting from such image sensor chips to make a lens module is beneficial to space design thereof. For example, it can facilitate miniaturization of the lens module.

An electronic circuit device according to the present invention includes a plane-shaped shield member having conductivity, at least one electronic circuit element having a first surface opposed to a second surface on which a connecting part is formed, the first surface arranged on the plane-shaped shield member, a rewiring layer comprises an insulating photosensitive resin layer enclosing the electronic circuit element on the plane-shaped shield member, a plurality of wiring photo vias having a plurality of first conductors electrically connected to a connecting part of the electronic element, a wiring having a second conductor electrically connected to each of the plurality of wiring photo vias on the same surface parallel to the plane-shaped shield member, and a wall-shaped shield groove having a third conductor for a sealing arranged to surround a thickness direction of the electronic circuit element.

A semiconductor device includes a first integrated circuit and a second integrated circuit. The first integrated circuit includes a semiconductor substrate and a dielectric layer disposed on a top surface of the semiconductor substrate. The second integrated circuit is disposed on the dielectric layer of the first integrated circuit and includes a dummy opening extending through the second integrated circuit and having a metal layer covering the inner walls of the dummy opening and in contact with the dielectric layer, wherein the metal layer is electrically grounded or electrically floating.

A display driver integrated circuit (IC) device includes a first substrate having a first front surface and a first back surface; a first interlayer insulating layer on the first front surface; a wiring layer in the first interlayer insulating layer; a first bonding insulating layer on the first interlayer insulating layer; a second substrate having a second front surface and a second back surface, the second front surface being disposed toward the first front surface; a second interlayer insulating layer on the second front surface a second bonding insulating layer on the second interlayer insulating layer and physically bonded to the first bonding insulating layer; and a back via stack structure penetrating the second substrate, the second interlayer insulating layer, the second bonding insulating layer, the first bonding insulating layer, and the first interlayer insulating layer and electrically connected to the wiring layer.

A leadless packaged semiconductor device includes a metal substrate having at least a first through-hole aperture having a first outer ring and a plurality of cuts through the metal substrate to define spaced apart metal pads on at least two sides of the first through-hole aperture. A semiconductor die that has a back side metal (BSM) layer on its bottom side and a top side with circuitry coupled to bond pads is mounted top side up on the first outer ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the first through-hole aperture that provides a die attachment that fills a bottom portion of the first through-hole aperture. Bond wires are between metal pads and the bond pads. A mold compound is also provided including between adjacent ones of the metal pads.

An electronic device including a first conductive element, a second conductive element, a substrate, and a conductor is provided. The first conductive element has a first region. The substrate has a through hole. The first through hole is disposed between the first conductive element and the second conductive element. The conductor electrically connects the first conductive element to the second conductive element through the through hole. The through hole is partially surrounded by the first region.

A method of forming a semiconductor device includes attaching a semiconductor die to a flag of a leadframe and forming a conductive connector over a portion of the semiconductor die and a portion of the flag. A conductive connection between a first bond pad of the semiconductor die and the flag is formed by way of the conductive connector. A second bond pad of the semiconductor die is connected to a conductive lead of the plurality by way of a bond wire.