H01L2224/37005

Current Shunt with Reduced Temperature Relative to Voltage Drop
20230326900 · 2023-10-12 ·

An electronic device includes a structured metallization layer including a plurality of contact pads that are electrically isolated from one another, and a metal clip connected in a current shunt measurement arrangement with a semiconductor device, wherein the metal clip includes first, second and third landing pads, a first bridge span connected between the first and second landing pads, and second bridge span connected between the second and third landing pads, wherein the first, second third landing pads are respectively thermally conductively attached to first, second and third contact pads from the structured metallization layer, and wherein the second mounting pad is electrically floating.

MULTI-CHIP DEVICE WITH GATE REDISTRIBUTION STRUCTURE
20230335530 · 2023-10-19 ·

A power device package includes first and second power transistor chips each having a control electrode, a first load electrode and a second load electrode. A control package terminal is electrically coupled to the control electrode of the first power transistor chip via a first wire bond connection and to the control electrode of the second power transistor chip via a second wire bond connection. A first package terminal is electrically coupled to the first load electrode of the first and second power transistor chips. A second package terminal is electrically coupled to the second load electrode of the first power transistor chip and/or the second power transistor chip. A length of the first wire bond connection is greater than a length of the second wire bond connection, and a cross-sectional area of the first wire bond connection is greater than a cross-sectional area of the second wire bond connection.

SEMICONDUCTOR DEVICE
20230317672 · 2023-10-05 ·

A semiconductor device includes: a first connector including a first plate having a first upper surface and a first terminal connected to the first plate, a first plate including a second plate and a third plate, a plate thickness of the second plate being thinner than a plate thickness of the third plate, the third plate being provided between the second plate and the first terminal; a semiconductor chip provided on the first upper surface; a first bonding material provided between the first upper surface and the semiconductor chip; a second connector provided on the semiconductor chip, a third connector, the first plate being provided between the first terminal and the third connector; a second bonding material provided between the second connector and the semiconductor chip; and a third bonding material provided between the second connector and the third connector.

SEMICONDUCTOR DIE PACKAGE

A semiconductor die package includes a semiconductor transistor die having a contact pad on an upper main face. The semiconductor die package also includes an electrical conductor disposed on the contact pad and fabricated by laser-assisted structuring of a metallic material, and an encapsulant covering the semiconductor die and at least a portion of the electrical conductor.

High voltage semiconductor package with pin fit leads

A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.

Current shunt with reduced temperature relative to voltage drop
11810888 · 2023-11-07 · ·

An electronic device includes a structured metallization layer including a plurality of contact pads that are electrically isolated from one another, and a metal clip connected in a current shunt measurement arrangement with a semiconductor device, wherein the metal clip includes first, second and third landing pads, a first bridge span connected between the first and second landing pads, and second bridge span connected between the second and third landing pads, wherein the first, second third landing pads are respectively thermally conductively attached to first, second and third contact pads from the structured metallization layer, and wherein the second mounting pad is electrically floating.

Metal clip with solder volume balancing reservoir

A semiconductor device includes a semiconductor die attached to a substrate and a metal clip attached to a side of the semiconductor die facing away from the substrate by a soldered joint. The metal clip has a plurality of slots dimensioned so as to take up at least 10% of a solder paste reflowed to form the soldered joint. Corresponding methods of production are also described.

SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
20220302071 · 2022-09-22 ·

A semiconductor device includes a semiconductor element (30), an input lead, and first drive leads (60) connecting a source electrode of the semiconductor element (30) to the input lead. The first drive leads (60) are formed of a thin metal plate that is belt-shaped as viewed in a thickness-wise direction (Z). The first drive leads (60) include at least a metal plate (60A) connected to the semiconductor element (60) and a metal plate (60B) stacked on the metal plate (60A). The metal plate (60A) includes a first connector (61A) connected to the semiconductor element (30). The metal plate (60B) includes a first connector (61B) connected to the first connector (61A). The first connectors (61A, 61B) are stacked in the thickness-wise direction (Z).

Semiconductor device

A semiconductor device includes: a substrate; a semiconductor element that disposed on the upper surface of the substrate; a sealing portion that seals the substrate and the semiconductor element; a first lead frame that has one end in contact with a upper surface of the first conductive layer at an end extending in the side direction of the upper surface of the substrate in the sealing portion, and has the other end exposed from the sealing portion; a first conductive bonding material that bonds between the upper surface of the first conductive layer and the lower surface side of the one end portion of the first lead frame at the end portion of the substrate, and has electrical conductivity.

Electronic module

An electronic module has a sealing part 90; a rear surface-exposed conductor 10, 20, 30 having a rear surface-exposed part 12, 22, 32 whose rear surface is exposed; a rear surface-unexposed conductor 40, 50 whose rear surface is not exposed; an electronic element 15, 25, which is provided in the sealing part 90 and provided on a front surface of the rear surface-exposed conductor 40, 50; a first connector 60 for electrically connecting the electronic element 15, 25 with the rear surface-exposed conductor 10, 20, 30; and a second connector 70 for electrically connecting the electronic element 15, 25 with the rear surface-unexposed conductor 40, 50. A thickness T1 of the first connector 60 is thicker than a thickness T2 of the second connector 70.